Event-oriented computing with reconfigurable platform. - Mitsuru Tomono; Masaki Nakanishi; Katsumasa Watanabe; Shigeru Yamashita (ASP-DAC, 2005)

A New Approach to Online FPGA Placement. - Mitsuru Tomono; Masaki Nakanishi; Shigeru Yamashita; Kazuo Nakajima; Katsumasa Watanabe (CISS, 2006)

An Efficient and Effective Algorithm for Online Task Placement with I/O Communications in Partially Reconfigurable FPGAs. - Mitsuru Tomono; Masaki Nakanishi; Shigeru Yamashita; Kazuo Nakajima; Katsumasa Watanabe (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006)

A novel processor design flow using processor description language applied to a vector coprocessor. - Makiko Ito; Mitsuru Tomono; Yi Ge; Yoshimasa Takebe; Masahiko Toichi; Makoto Mouri; Yoshio Hirose (VLSI-DAT, 2013)

An energy-efficient SIMD DSP with multiple VLIW configurations and an advanced memory access unit for LTE-A modem LSIs. - Mitsuru Tomono; Makiko Ito; Yoshitaka Nomura; Makoto Mouri; Yoshio Hirose (ICMV, 2015)

Real-Time Human Pose Estimation via Cascaded Neural Networks Embedded with Multi-task Learning. - Satoshi Tanabe; Ryosuke Yamanaka; Mitsuru Tomono; Makiko Ito; Teruo Ishihara (CAIP (2), 2017)