An Algorithm Adapted Autonomous Controlling Concept for a Parallel Single-Chip Digital Signal Processor. - Johannes Kneip; Mladen Berekovic; Jens Peter Wittenburg; Willm Hinrichs; Peter Pirsch (J. VLSI Signal Process., 1997)

An Array Processor Architecture with Parallel Data Cache for Image Rendering and Compositing. - Mladen Berekovic; Peter Pirsch (Computer Graphics International, 1998)

Realization of a Programmable Parallel DSP for High Performance Image Processing Applications. - Jens Peter Wittenburg; Willm Hinrichs; Johannes Kneip; Martin Ohmacht; Mladen Berekovic; Hanno Lieske; Helge Kloos; Peter Pirsch (DAC, 1998)

A flexible processor architecture for MPEG-4 image compositing. - Mladen Berekovic; Rainer Frase; Peter Pirsch (ICASSP, 1998)

Architecture of a coprocessor module for image compositing. - Mladen Berekovic; Peter Pirsch (ICECS, 1998)

An Algorithm-Hardware-System Approach to VLIW Multimedia Processors. - Mladen Berekovic; Peter Pirsch; Johannes Kneip (J. VLSI Signal Process., 1998)

Hardware Realisierung einer JAVA Virtual Machine für High Performance Multimedia-Anwendungen. - Helge Kloos; Mladen Berekovic; Peter Pirsch (ARCS, 1999)

Design and architecture of the MPEG-4 video rendering co-processor 'TANGRAM'. - Christoph Heer; Carolina Miro; Anne Lafage; Mladen Berekovic; Giovanni Ghigo; Thorsten Selinger; Kai-Immo Wels (ICECS, 1999)

Architecture of a hardware module for MPEG-4 shape decoding. - Mladen Berekovic; K. Jacob; Peter Pirsch (ISCAS (1), 1999)

The MPEG-4 Multimedia Coding Standard: Algorithms, Architectures and Applications. - S. Bauer; Johannes Kneip; T. Mlasko; Bernd Schmale; J. Vollmer; Andreas Hutter; Mladen Berekovic (J. VLSI Signal Process., 1999)

Hardware Realization of a Java Virtual Machine for High Performance Multimedia Applications. - Mladen Berekovic; Helge Kloos; Peter Pirsch (J. VLSI Signal Process., 1999)

Instruction Set Extensions for MPEG-4 Video. - Mladen Berekovic; Hans-Joachim Stolberg; Mark Bernd Kulaczewski; Peter Pirsch; Henning Möller; Holger Runge; Johannes Kneip; Benno Stabernack (J. VLSI Signal Process., 1999)

Architecture of an Image Rendering Co-Processor for MPEG-4 Systems. - Mladen Berekovic; Peter Pirsch; Thorsten Selinger; Kai-Immo Wels; Carolina Miro; Anne Lafage; Christoph Heer; Giovanni Ghigo (ASAP, 2000)

Co-processor architecture for MPEG-4 main profile visual compositing. - Mladen Berekovic; Peter Pirsch; Thorsten Selinger; Kai-Immo Wels; Carolina Miro; Anne Lafage; Christoph Heer; Giovanni Ghigo (ISCAS, 2000)

The M-PIRE MPEG-4 codec DSP and its macroblock engine. - Hans-Joachim Stolberg; Mladen Berekovic; Peter Pirsch; Holger Runge; Henning Möller; Johannes Kneip (ISCAS, 2000)

Coprocessor architecture for MPEG-4 video object rendering. - Christoph Heer; Carolina Miro; Anne Lafage; Mladen Berekovic; Giovanni Ghigo; Thorsten Selinger; Kai-Immo Wels (VCIP, 2000)

A programmable co-porcessor for MPEG-4 video. - Mladen Berekovic; Hans-Joachim Stolberg; Peter Pirsch; Holger Runge (ICASSP, 2001)

Implementing The MPEG-4 Advanced Simple Profile For Streaming Video Applications. - Hans-Joachim Stolberg; Mladen Berekovic; Peter Pirsch; Holger Runge (ICME, 2001)

A platform-independent methodology for performance estimation of streaming media applications. - Hans-Joachim Stolberg; Mladen Berekovic; Peter Pirsch (ICME (2), 2002)

Multicore system-on-chip architecture for MPEG-4 streaming video. - Mladen Berekovic; Hans-Joachim Stolberg; Peter Pirsch (IEEE Trans. Circuits Syst. Video Technol., 2002)

Architecture of an Image Rendering Co-Processor for MPEG-4 Visual Compositing. - Mladen Berekovic; Peter Pirsch; Thorsten Selinger; Kai-Immo Wels; Carolina Miro; Anne Lafage; Christoph Heer; Giovanni Ghigo (J. VLSI Signal Process., 2002)

HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications. - Hans-Joachim Stolberg; Mladen Berekovic; Lars Friebe; Sören Moch; Sebastian Flügel; Xun Mao; Mark Bernd Kulaczewski; Heiko Klußmann; Peter Pirsch (DATE, 2003)

HiBRID-SoC: a multi-core architecture for image and video applications. - Hans-Joachim Stolberg; Mladen Berekovic; Lars Friebe; Sören Moch; Sebastian Flügel; Mark Bernd Kulaczewski; Peter Pirsch (ICIP (3), 2003)

HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing. - Hans-Joachim Stolberg; Mladen Berekovic; Lars Friebe; Sören Moch; Mark Bernd Kulaczewski; Peter Pirsch (VLSI-SOC, 2003)

A scalable, clustered SMT processor for digital signal processing. - Mladen Berekovic; Sören Moch; Peter Pirsch (SIGARCH Comput. Archit. News, 2004)

HIBRID-SOC: a multi-core architecture for image and video applications. - Sören Moch; Mladen Berekovic; Hans-Joachim Stolberg; Lars Friebe; Mark Bernd Kulaczewski; Andreas Dehnhardt; Peter Pirsch (SIGARCH Comput. Archit. News, 2004)

HiBRID-SoC: A Multi-Core SoC Architecture for Multimedia Signal Processing. - Hans-Joachim Stolberg; Mladen Berekovic; Sören Moch; Lars Friebe; Mark Bernd Kulaczewski; Sebastian Flügel; Heiko Klußmann; Andreas Dehnhardt; Peter Pirsch (J. VLSI Signal Process., 2005)

A Platform-Independent Methodology for Performance Estimation of Multimedia Signal Processing Applications. - Hans-Joachim Stolberg; Mladen Berekovic; Peter Pirsch (J. VLSI Signal Process., 2005)

Eine skalierbare, verteilte Prozessor-Architektur mit simultanem multi-threading für Anwendungen der digitalen Signalverarbeitung. - Mladen Berekovic (2005)

Hardware and a Tool Chain for ADRES. - Bjorn De Sutter; Bingfeng Mei; T. Andrei Bartic; Tom Vander Aa; Mladen Berekovic; Jean-Yves Mignolet; Kris Croes; Paul Coene; Miro Cupac; Aïssa Couvreur; Andy Folens; Steven Dupont; et al. (ARC, 2006)

A Scalable, Multi-thread, Multi-issue Array Processor Architecture for DSP Applications Based on Extended Tomasulo Scheme. - Mladen Berekovic; Tim Niggemeier (SAMOS, 2006)

Human++: Emerging Technology for Body Area Networks. - Julien Penders; Bert Gyselinckx; Ruud J. M. Vullers; Olivier Rousseaux; Mladen Berekovic; Michael De Nil; Chris Van Hoof; Julien Ryckaert; Refet Firat Yazicioglu; Paolo Fiorini; Vladimir Leonov (VLSI-SoC (Selected Papers), 2006)

Architectural Exploration of the ADRES Coarse-Grained Reconfigurable Array. - Frank Bouwens; Mladen Berekovic; Andreas Kanstein; Georgi Gaydadjiev (ARC, 2007)

MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture. - Kehuai Wu; Andreas Kanstein; Jan Madsen; Mladen Berekovic (ARC, 2007)

Electrocardiogram on Wireless Sensor Nodes. - Lennart Yseboodt; Michael De Nil; Mladen Berekovic (Power-aware Computing Systems, 2007)

Mapping control-intensive video kernels onto a coarse-grain reconfigurable architecture: the H.264/AVC deblocking filter. - C. Arbelo; Andreas Kanstein; Sebastián López; José Francisco López; Mladen Berekovic; Roberto Sarmiento; Jean-Yves Mignolet (DATE, 2007)

Ulta-Low-Power Wireless Sensor Node Design on 100 uW Scavenging Energy for Applications In Biomedical Monitoring. - Mladen Berekovic (DSD, 2007)

Still Image Processing on Coarse-Grained Reconfigurable Array Architectures. - Matthias Hartmann; Vasileios (Vassilis) Pantazis; Tom Vander Aa; Mladen Berekovic; Christian Hochberger; Bjorn De Sutter (ESTIMedia, 2007)

Ultra Low Power ASIP Design for Wireless Sensor Nodes. - Michael De Nil; Lennart Yseboodt; Frank Bouwens; Jos Hulzink; Mladen Berekovic; Jos Huisken; Jef L. van Meerbergen (ICECS, 2007)

Design of 100 muW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring. - Lennart Yseboodt; Michael De Nil; Jos Huisken; Mladen Berekovic; Qin Zhao; Frank Bouwens; Jef L. van Meerbergen (SAMOS, 2007)

Mapping of the AES cryptographic algorithm on a Coarse-Grain reconfigurable array processor. - Andres Garcia; Mladen Berekovic; Tom Vander Aa (ASAP, 2008)

Low power microarchitecture with instruction reuse. - Frederico Pratas; Georgi Gaydadjiev; Mladen Berekovic; Leonel Sousa; Stefanos Kaxiras (Conf. Computing Frontiers, 2008)

Architecture Enhancements for the ADRES Coarse-Grained Reconfigurable Array. - Frank Bouwens; Mladen Berekovic; Bjorn De Sutter; Georgi Gaydadjiev (HiPEAC, 2008)

Implementation of an UWB Impulse-Radio Acquisition and Despreading Algorithm on a Low Power ASIP. - Jochem Govers; Jos Huisken; Mladen Berekovic; Olivier Rousseaux; Frank Bouwens; Michael De Nil; Jef L. van Meerbergen (HiPEAC, 2008)

Interconnect Power Analysis for a Coarse-Grained Reconfigurable Array Processor. - Mladen Berekovic; Frank Bouwens; Tom Vander Aa; Diederik Verkest (PATMOS, 2008)

Rekonfigurierbare Architekturen. - Mladen Berekovic; Christian Hochberger; Andreas Koch 001 (Inform. Spektrum, 2008)

Editorial. - Mladen Berekovic; Andy D. Pimentel; Timo D. Hämäläinen (J. Syst. Archit., 2008)

A Distributed, Simultaneously Multi-Threaded (SMT) Processor with Clustered Scheduling Windows for Scalable DSP Performance. - Mladen Berekovic; Tim Niggemeier (J. Signal Process. Syst., 2008)

Low-Power ASIP Architecture Exploration and Optimization for Reed-Solomon Processing. - Andreas Genser; Christian Bachmann; Christian Steger; Jos Hulzink; Mladen Berekovic (ASAP, 2009)

A low-power ASIP for IEEE 802.15.4a ultra-wideband impulse radio baseband processing. - Christian Bachmann; Andreas Genser; Jos Hulzink; Mladen Berekovic; Christian Steger (DATE, 2009)

ESL design in the context of embedded systems education. - Mladen Berekovic; Matthias Hanke; Thomas Schuster 002; Tim Kranich; Rolf Ernst (WESE@ESWEEK, 2009)

Editorial. - Mladen Berekovic; Vipin Chaudhary; Alex Dean; Jason Fritts (Microprocess. Microsystems, 2009)

Mapping of nomadic multimedia applications on the ADRES reconfigurable array processor. - Mladen Berekovic; Andreas Kanstein; Bingfeng Mei; Bjorn De Sutter (Microprocess. Microsystems, 2009)

Design of 100 µW Wireless Sensor Nodes for Biomedical Monitoring. - Lennart Yseboodt; Michael De Nil; Jos Huisken; Mladen Berekovic; Qin Zhao; Frank Bouwens; Jos Hulzink; Jef L. van Meerbergen (J. Signal Process. Syst., 2009)

Low-Power Reconfigurable Architectures for High-Performance Mobile Nodes. - Matthias Hanke; Tim Kranich; Mladen Berekovic; Yannis Papaefstathiou (Dynamically Reconfigurable Architectures, 2010)

QoR Analysis of Automated Clock-Mesh Implementation under OCV Consideration. - Dennis Bode; Mladen Berekovic; Axel Borkowski; Ludger Buker (DSD, 2010)

NoC Switch with Credit Based Guaranteed Service Support Qualified for GALS Systems. - Tim Kranich; Mladen Berekovic (DSD, 2010)

Small-ruleset regular expression matching on GPGPUs: quantitative performance analysis and optimization. - Jamin Naghmouchi; Daniele Paolo Scarpazza; Mladen Berekovic (ICS, 2010)

Editorial. - Mladen Berekovic; Andy D. Pimentel (J. Signal Process. Syst., 2010)

Still Image Processing on Coarse-Grained Reconfigurable Array Architectures. - Matthias Hartmann; Vasileios (Vassilis) Pantazis; Tom Vander Aa; Mladen Berekovic; Christian Hochberger (J. Signal Process. Syst., 2010)

Performance of RCCE Broadcast Algorithm in SCC. - Hayder Al-Khalissi; Mladen Berekovic (MARC Symposium, 2011)

Evaluation of Interpreted Languages with Open MPI. - Matti Bickel; Adrian Knoth; Mladen Berekovic (EuroMPI, 2011)

IDAMC: A Many-Core Platform with Run-Time Monitoring for Mixed-Criticality. - Boris Motruk; Jonas Diemer; Rainer Buchty; Rolf Ernst; Mladen Berekovic (HASE, 2012)

Low-Overhead Barrier Synchronization for OpenMP-like Parallelism on the Single-Chip Cloud Computer. - Hayder Al-Khalissi; Andrea Marongiu; Mladen Berekovic (MARC@RWTH, 2012)

Introduction to the Special Section on ESTIMedia'08. - Mladen Berekovic; Samarjit Chakraborty; Petru Eles; Andy D. Pimentel (ACM Trans. Embed. Comput. Syst., 2012)

Introduction to special section ESTIMedia'09. - Andy D. Pimentel; Naehyuck Chang; Mladen Berekovic (ACM Trans. Embed. Comput. Syst., 2012)

Power Monitoring for Mixed-Criticality on a Many-Core Platform. - Boris Motruk; Jonas Diemer; Rainer Buchty; Mladen Berekovic (ARCS, 2013)

Efficient Barrier Synchronization for OpenMP-Like Parallelism on the Intel SCC. - Hayder Al-Khalissi; Rainer Buchty; Mladen Berekovic (ICPADS, 2013)

Safe Virtual Interrupts Leveraging Distributed Shared Resources and Core-to-Core Communication on Many-Core Platforms. - Boris Motruk; Jonas Diemer; Philip Axer; Rainer Buchty; Mladen Berekovic (PRDC, 2013)

Designing a low-power wireless sensor node rASIP architecture. - Jan Wagner; Rainer Buchty; Christian Schubert; Mladen Berekovic (SiPS, 2013)

On the Relevance of Architectural Awareness for Efficient Fork/Join Support on Cluster-Based Manycores. - Hayder Al-Khalissi; Mladen Berekovic; Andrea Marongiu (MES, 2014)

On RTL to TLM Abstraction to Benefit Simulation Performance and Modeling Productivity in NoC Design Exploration. - Sven Alexander Horsinka; Rolf Meyer; Jan Wagner; Rainer Buchty; Mladen Berekovic (NoCArc@MICRO, 2014)

A lightweight-system-level power and area estimation methodology for application specific instruction set processors. - Syed Abbas Ali Shah; Jan Wagner; Thomas Schuster 002; Mladen Berekovic (PATMOS, 2014)

An Efficient Barrier Implementation for OpenMP-Like Parallelism on the Intel SCC. - Hayder Al-Khalissi; Syed Abbas Ali Shah; Mladen Berekovic (PDP, 2014)

SoCRocket - A virtual platform for the European Space Agency's SoC development. - Thomas Schuster 002; Rolf Meyer; Rainer Buchty; Luca Fossati; Mladen Berekovic (ReCoSoC, 2014)

An evaluation of energy efficient microcontrollers. - Ioanna Tsekoura; Gregor Rebel; Peter Glösekötter; Mladen Berekovic (ReCoSoC, 2014)

High efficient hardware allocation framework of arbitrary inverse transform coding blocks in H.265. - Chi-Chia Sun; Heng-Chi Lai; Sin-Kun Lin; Ming-Hwa Sheu; Mladen Berekovic (ISPACS, 2015)

Revealing Potential Performance Improvements by Utilizing Hybrid Work-Sharing for Resource-Intensive Seismic Applications. - Patrick Siegl; Rainer Buchty; Mladen Berekovic (PDP, 2015)

A scriptable, standards-compliant reporting and logging extension for SystemC. - Jan Wagner; Rolf Meyer; Rainer Buchty; Mladen Berekovic (SAMOS, 2015)

A Comparison of High-Level Design Tools for SoC-FPGA on Disparity Map Calculation Example. - Shaodong Qin; Mladen Berekovic (CoRR, 2015)

Towards bridging the gap between academic and industrial heterogeneous system architecture design space exploration. - Patrick Siegl; Rainer Buchty; Mladen Berekovic (RAPIDO@HiPEAC, 2016)

Data-Centric Computing Frontiers: A Survey On Processing-In-Memory. - Patrick Siegl; Rainer Buchty; Mladen Berekovic (MEMSYS, 2016)

Accelerating MPSoC design space exploration within system-level frameworks. - Syed Abbas Ali Shah; Bastian Farkas; Rolf Meyer; Mladen Berekovic (NORCAS, 2016)

A Scriptable Standard-Compliant Reporting and Logging Framework for SystemC. - Rolf Meyer; Jan Wagner; Bastian Farkas; Sven Alexander Horsinka; Patrick Siegl; Rainer Buchty; Mladen Berekovic (ACM Trans. Embed. Comput. Syst., 2016)

Energy efficient cooperative spectrum sensing in Cognitive Radio Sensor Network Using FPGA: A survey. - Amel Alfahham; Mladen Berekovic (FRUCT, 2017)

Real-time smart stereo camera based on FPGA-SoC. - Soenke Michalik; Soeren Michalik; Jamin Naghmouchi; Mladen Berekovic (Humanoids, 2017)

IR-drop aware Design & technology co-optimization for N5 node with different device and cell height options. - Luca Mattii; Dragomir Milojevic; Peter Debacker; Yasser Sherazi; Mladen Berekovic; Praveen Raghavan (ICCAD, 2017)

A bandwidth accurate, flexible and rapid simulating multi-HMC modeling tool. - Patrick Siegl; Rainer Buchty; Mladen Berekovic (MEMSYS, 2017)

A Survey of Hardware Technologies for Mixed-Critical Integration Explored in the Project EMC^2. - Haris Isakovic; Radu Grosu; Denise Ratasich; Jiri Kadlec; Zdenek Pohl; Steve Kerrison; Kyriakos Georgiou; Kerstin Eder; Norbert Druml; Lillian Tadros; Flemming Christensen; Emilie Wheatley; et al. (SAFECOMP Workshops, 2017)

Hardware-Accelerated Index Construction for Semantic Web. - Christopher Blochwitz; Julian Wolff; Mladen Berekovic; Dennis Heinrich; Sven Groppe; Jan Moritz Joseph; Thilo Pionteck (FPT, 2018)

Effects of Concurrent Access to Embedded Multicore Microcontrollers with Hard Real-Time Demands. - Philipp Jungklass; Mladen Berekovic (SIES, 2018)

MemOpt: Automated Memory Distribution for Multicore Microcontrollers with Hard Real-Time Requirements. - Philipp Jungklass; Mladen Berekovic (NORCAS, 2019)

Cache-Kohärenz für embedded Multicore-Mikrocontroller mit harter Echtzeitanforderung. - Philipp Jungklass; Mladen Berekovic (Echtzeit, 2019)

StreamGrid - An AXI-Stream-Compliant Overlay Architecture. - Christopher Blochwitz; León Philipp; Mladen Berekovic; Thilo Pionteck (ARC, 2021)

Clone-Resistant Secured Booting Based on Unknown Hashing Created in Self-Reconfigurable Platform. - Randa Zarrouk; Saleh Mulhem; Wael Adi; Mladen Berekovic (ARC, 2021)

A comparative survey of open-source application-class RISC-V processor implementations. - Alexander Dörflinger; Mark Albers; Benedikt Kleinbeck; Yejun Guan; Harald Michalik; Raphael Klink; Christopher Blochwitz; Anouar Nechi; Mladen Berekovic (CF, 2021)

Static Allocation of Basic Blocks Based on Runtime and Memory Requirements in Embedded Real-Time Systems with Hierarchical Memory Layout. - Philipp Jungklass; Mladen Berekovic (NG-RES@HiPEAC, 2021)

Hardware-Beschleuniger für automobile Multicore-Mikrocontroller mit einer harten Echtzeitanforderung. - Christian Böttcher; Philipp Jungklass; Mladen Berekovic (Echtzeit, 2021)

Echtzeitfähige Ethernet-Kommunikation in automobilen Multicore-Systemen mit hierarchischem Speicherlayout. - Sercan Körür; Philipp Jungklass; Mladen Berekovic (Echtzeit, 2021)

Contemporary Physical Clone-Resistant Identity for IoTs and Emerging Technologies. - Emad Hamadaqa; Saleh Mulhem; Wael Adi; Mladen Berekovic (Cryptogr., 2021)

RemEduLa - Remote Education Laboratory for FPGA Design Technology. - Christopher Blochwitz; Philipp Grothe; Sven Dreier; Waiel Aljnabi; Rainer Buchty; Mladen Berekovic (ISCAS, 2022)

On the Dependability Lifecycle of Electrical/Electronic Product Development: The Dual-Cone V-Model. - Bernhard Bauer 003; Mouadh Ayache; Saleh Mulhem; Meirav Nitzan; Jyotika Athavale; Rainer Buchty; Mladen Berekovic (Computer, 2022)

An Almost Fully RRAM-Based LUT Design for Reconfigurable Circuits. - Philipp Grothe; Saleh Mulhem; Mladen Berekovic (ARC, 2023)

SystemC Model of Power Side-Channel Attacks Against AI Accelerators: Superstition or not? - Andrija Neskovic; Saleh Mulhem; Alexander Treff; Rainer Buchty; Thomas Eisenbarth 001; Mladen Berekovic (ICCAD, 2023)

Protecting Vulnerable Road Users: Semantic Video Analysis for Accident Prediction. - Julian Petzold; Mostafa Wahby; Youssef Ziad; Mostafa ElSheikh; Ahmed Dawood; Mladen Berekovic; Heiko Hamann (SSCI, 2023)

Practical Trustworthiness Model for DNN in Dedicated 6G Application. - Anouar Nechi; Ahmed Mahmoudi; Christoph Herold; Daniel Widmer; Thomas Kürner; Mladen Berekovic; Saleh Mulhem (WiMob, 2023)

FPGA-based Deep Learning Inference Accelerators: Where Are We Standing? - Anouar Nechi; Lukas Groth; Saleh Mulhem; Farhad Merchant; Rainer Buchty; Mladen Berekovic (ACM Trans. Reconfigurable Technol. Syst., 2023)

Reconfigurable Edge Hardware for Intelligent IDS: Systematic Approach. - Wadid Foudhaili; Anouar Nechi; Celine Thermann; Mohammad Al Johmani; Rainer Buchty; Mladen Berekovic; Saleh Mulhem (ARC, 2024)

EMDRIVE Architecture: Embedded Distributed Computing and Diagnostics from Sensor to Edge. - Patrick Schmidt; Iuliia Topko; Matthias Stammler; Tanja Harbaum; Jürgen Becker 001; Rico Berner; Omar Ahmed; Jakub Jagielski; Thomas Seidler; Markus Abel; Marius Kreutzer; Maximilian Kirschner; et al. (DATE, 2024)

Machine Learning for SRAM Stability Analysis. - Jihene Bouhlila; Felix Last; Rainer Buchty; Mladen Berekovic; Saleh Mulhem (ISCAS, 2024)

Holistic Framework for Evaluating the Trustworthiness of Integrated Circuits. - Mouadh Ayache; Enkele Rama; Saleh Mulhem; Mladen Berekovic; Matthias Korb (VLSI-SoC, 2024)

Trustworthy Integrated Circuits: From Safety to Security and Beyond. - Enkele Rama; Mouadh Ayache; Rainer Buchty; Bernhard Bauer 003; Matthias Korb; Mladen Berekovic; Saleh Mulhem (IEEE Access, 2024)

On the Road to Clarity: Exploring Explainable AI for World Models in a Driver Assistance System. - Mohamed Roshdi; Julian Petzold; Mostafa Wahby; Hussein Ebrahim; Mladen Berekovic; Heiko Hamann (CoRR, 2024)

Secure Software/Hardware Hybrid In-Field Testing for System-on-Chip. - Saleh Mulhem; Christian Ewert; Andrija Neskovic; Amrit Sharma Poudel; Christoph Hübner; Mladen Berekovic; Rainer Buchty (CoRR, 2024)

ML-Based Trojan Classification: Repercussions of Toxic Boundary Nets. - Saleh Mulhem; Felix Muuss; Christian Ewert; Rainer Buchty; Mladen Berekovic (IEEE Embed. Syst. Lett., 2024)

Multi-Partner Project: Artificial Intelligence in Manufacturing Leading to Sustainability and the Consideration of Human Aspects (AIMS5.0). - Anouar Nechi; Yasin Ghafourian; Belal Abu-Naim; Thomas Gutt; George Dimitrakopoulos 001; Amira Moualhi; Mladen Berekovic; Pál Varga; Markus Tauber (DATE, 2025)

Cross Technology Prediction for SRAM Stability Analysis. - Jihene Bouhlila; Rainer Buchty; Mladen Berekovic (ISCAS, 2025)

A Lightweight Peripheral Design for RRAM-based LUTs. - Philipp Grothe; Christoph Hübner; Rainer Buchty; Mladen Berekovic; Saleh Mulhem (ISCAS, 2025)

PAT-ViT: Token Pruning-based Adversarial Tuning for Robust Vision Transformers. - Yun-Hao Yang; Yuan-June Luo; Wan-Jung Chen; An-Yeu Andy Wu; Shih-Hsu Huang; Mladen Berekovic (ISCAS, 2025)

A Systematic Mapping Study on SystemC/TLM Modeling Capabilities in New Research Domains. - Ahmed Mahmoudi; Andrija Neskovic; Celine Thermann; Robin Sehm; Christoph Hübner; Tavia Plattenteich; Rolf Meyer; Rainer Buchty; Mladen Berekovic; Saleh Mulhem (ACM Trans. Design Autom. Electr. Syst., 2025)

Nail: Not Another Fault-Injection Framework for Chisel-generated RTL. - Robin Sehm; Christian Ewert; Rainer Buchty; Mladen Berekovic; Saleh Mulhem (CoRR, 2025)