Effect of technology scaling on digital CMOS logic styles. - Mohamed W. Allam; Mohab H. Anis; Mohamed I. Elmasry (CICC, 2000)

A contention-free domino logic for scaled-down CMOS technologies with ultra low threshold voltages. - Muhammad E. S. Elrabaa; Mohab H. Anis; Mohamed I. Elmasry (ISCAS, 2000)

Managing Power Consumption and Variability in Nanometer Circuits. - Mohab H. Anis (ICECS, 2007)

Framework for statistical design of a flip-flop. - Sayed Alireza Sadrossadat; Minoo Mirsaeedi; Kumaraswamy Ponnambalam; Mohab H. Anis (ICECS, 2009)

A DFM tool for analyzing lithography and stress effects on standard cells and critical path performance in 45nm digital designs. - Rami F. Salem; Abdelrahman ElMously; Haitham Eissa; Mohamed Dessouky; Mohab H. Anis (IDT, 2010)

An electrical-aware parametric DFM solution for analog circuits. - Rami Fathy Salem; Ahmed Arafa; Sherif Hany; Abdelrahman ElMously; Haitham Eissa; Mohamed Dessouky; David Nairn; Mohab H. Anis (IDT, 2011)

Self-aligned double patterning (SADP) layout decomposition. - Minoo Mirsaeedi; J. Andres Torres; Mohab H. Anis (ISQED, 2011)

A parametric DFM solution for analog circuits: Electrical driven hot spot detection, analysis and correction flow. - Rami F. Salem; Ahmed Arafa; Sherif Hany; Abdelrahman ElMously; Haitham Eissa; Mohamed Dessouky; David Nairn; Mohab H. Anis (SoCC, 2011)

A statistical yield optimization framework for interconnect in double patterning lithography. - Minoo Mirsaeedi; Mohab H. Anis (Microelectron. J., 2011)

High performance electrical driven hotspot detection solution for full chip design using a novel device parameter matching technique. - Rami F. Salem; Mohamed Al-Imam; Abdelrahman ElMously; Haitham Eissa; Ahmed Arafa; Mohab H. Anis (ISQED, 2012)

Schematic-driven physical verification: Fully automated solution for analog IC design. - Ahmed Arafa; Hend Wagieh; Rami Fathy Salem; John Ferguson; Doug Morgan; Mohab H. Anis; Mohamed Dessouky (SoCC, 2012)

Tagged probabilistic simulation based error probability estimation for better-than-worst case circuit design. - Amr M. S. Tosson; Siddharth Garg; Mohab H. Anis (VLSI-SoC, 2013)

Parametric DFM Solution for Analog Circuits: Electrical-Driven Hotspot Detection, Analysis, and Correction Flow. - Haitham Eissa; Rami Fathy Salem; Ahmed Arafa; Sherif Hany; Abdelrahman ElMously; Mohamed Dessouky; David Nairn; Mohab H. Anis (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Litho-Friendly Decomposition Method for Self-Aligned Double Patterning. - Minoo Mirsaeedi; Andres J. Torres; Mohab H. Anis (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Litho-Friendly Decomposition Method for Self-Aligned Triple Patterning. - Minoo Mirsaeedi; Andres J. Torres; Mohab H. Anis (IEEE Trans. Very Large Scale Integr. Syst., 2014)

8T1R: A Novel Low-power High-speed RRAM-based Non-volatile SRAM Design. - Amr M. S. Tosson Abdelwahed; Adam Neale; Mohab H. Anis; Lan Wei (ACM Great Lakes Symposium on VLSI, 2016)

RRAM Refresh Circuit: A Proposed Solution To Resolve The Soft-Error Failures For HfO2/Hf 1T1R RRAM Memory Cell. - Amr M. S. Tosson; Mohab H. Anis; Lan Wei (ACM Great Lakes Symposium on VLSI, 2016)

1T2R: A novel memory cell design to resolve single-event upset in RRAM arrays. - Amr M. S. Tosson; Shimeng Yu; Mohab H. Anis; Lan Wei (ASICON, 2017)

Mitigating the Effect of Reliability Soft-errors of RRAM Devices on the Performance of RRAM-based Neuromorphic Systems. - Amr M. S. Tosson; Shimeng Yu; Mohab H. Anis; Lan Wei (ACM Great Lakes Symposium on VLSI, 2017)

Analysis of RRAM Reliability Soft-Errors on the Performance of RRAM-Based Neuromorphic Systems. - Amr M. S. Tosson; Shimeng Yu; Mohab H. Anis; Lan Wei (ISVLSI, 2017)

A Study of the Effect of RRAM Reliability Soft Errors on the Performance of RRAM-Based Neuromorphic Systems. - Amr M. S. Tosson; Shimeng Yu; Mohab H. Anis; Lan Wei (IEEE Trans. Very Large Scale Integr. Syst., 2017)