Optimized Statistical Analog Fault Simulation. - Abdelhakim Khouas; Mohamed Dessouky; Anne Derieux (Asian Test Symposium, 1999)

A third-order current-mode continuous-time ΣΔ modulator. - Hassan Aboushady; Mohamed Dessouky; Elizabeth de Lira Mendes; Patrick Loumeau (ICECS, 1999)

A current-mode continuous-time Sigma-Delta modulator with delayed return-to-zero feedback. - Hassan Aboushady; Elizabeth de Lira Mendes; Mohamed Dessouky; Patrick Loumeau (ISCAS (2), 1999)

Rail-to-rail operation of very low voltage CMOS switched-capacitor circuits. - Mohamed Dessouky; Andreas Kaiser (ISCAS (2), 1999)

A 1 V 1 mW digital-audio ΔΣ modulator with 88 dB dynamic range using local switch bootstrapping. - Mohamed Dessouky; Andreas Kaiser (CICC, 2000)

Layout-Oriented Synthesis of High Performance Analog Circuits. - Mohamed Dessouky; Marie-Minerve Louërat; Jacky Porte (DATE, 2000)

Very low-voltage fully differential amplifier for switched-capacitor applications. - Mohamed Dessouky; Andreas Kaiser (ISCAS, 2000)

A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits. - Mohamed Dessouky; Marie-Minerve Louërat (ISQED, 2000)

Analog design for reuse - case study: very low-voltage sigma-delta modulator. - Mohamed Dessouky; Andreas Kaiser; Marie-Minerve Louërat; Alain Greiner (DATE, 2001)

Switch sizing for very low-voltage switched-capacitor circuits. - Mohamed Dessouky; Marie-Minerve Louërat; Andreas Kaiser (ICECS, 2001)

Very low-voltage digital-audio ΔΣ modulator with 88-dB dynamic range using local switch bootstrapping. - Mohamed Dessouky; Andreas Kaiser (IEEE J. Solid State Circuits, 2001)

Automatic Generation of Common-Centroid Capacitor Arrays with Arbitrary Capacitor Ratio. - Mohamed Dessouky; DiaaEldin Sayed (DATE, 2002)

Synthesis of CMOS Analog Cells Using AMIGO. - Ramy Iskander; Mohamed Dessouky; Maie Aly; Mahmoud Magdy; Noha Hassan; Noha Soliman; Sami Moussa (DATE, 2003)

Analog IP migration using design knowledge extraction. - Sherif Hammouda; Mohamed Dessouky; Mohamed Tawfik; Wael M. Badawy (CICC, 2004)

A Fully Automated Approach for Analog Circuit Reuse. - Sherif Hammouda; Mohamed Dessouky; Mohamed Tawfik; Wael M. Badawy (IWSOC, 2004)

Evaluation of Capacitor Ratios in Automated Accurate Common-Centroid Capacitor Arrays. - DiaaEldin Khalil; Mohamed Dessouky; Vincent Bourguet; Marie-Minerve Louërat; Andreia Cathelin; Hani F. Ragai (ISQED, 2005)

Forward. - Chrissoleon T. Papadopoulos; Eddie O'Kelly; Mohamed Dessouky (Comput. Ind. Eng., 2005)

Chameleon ART: a non-optimization based analog design migration framework. - Sherif Hammouda; Hazem Said; Mohamed Dessouky; Mohamed Tawfik; Quang Nguyen; Wael M. Badawy; Hazem M. Abbas; Hussein I. Shahein (DAC, 2006)

A Case-Based Reasoning Approach for the Automatic Generation of VHDL-AMS Models. - Ahmad Al-Kashef; Manal M. Zaky; Mohamed Dessouky; Hassan El-Ghitani (BMAS, 2008)

Analog design migration: An overview. - Mohamed Dessouky (ICECS, 2009)

1-V, High Speed, Low Leakage CMOS CML Multiplexer. - Shohdy Abdelkader; M. Omar; Mohamed Dessouky (ISCAS, 2009)

Design of a low-power ZigBee receiver front-end for wireless sensors. - Amr Amin Hafez; Mohamed Dessouky; Hani F. Ragai (Microelectron. J., 2009)

A DFM tool for analyzing lithography and stress effects on standard cells and critical path performance in 45nm digital designs. - Rami F. Salem; Abdelrahman ElMously; Haitham Eissa; Mohamed Dessouky; Mohab H. Anis (IDT, 2010)

Foreground digital calibration of non-linear errors in pipelined A/D converters. - Hussein Adel; Mohamed Dessouky; Marie-Minerve Louërat; Hugo Gicquel; Hisham Haddara (ISCAS, 2010)

Extended division range 2/3 chain frequency divider with dynamic control word. - Haytham Ashour; Mohamed Dessouky; Khaled Sharaf (ISCAS, 2010)

13-bit 205 MS/s time-interleaved pipelined ADC with digital background calibration. - Mohamed Mohsen; Mohamed Dessouky (ISCAS, 2010)

Design of tunable continuous-time quadrature bandpass delta-sigma modulators. - Khaled Sakr; Mohamed Dessouky; Abd-El Halim Zekry (IDT, 2011)

An electrical-aware parametric DFM solution for analog circuits. - Rami Fathy Salem; Ahmed Arafa; Sherif Hany; Abdelrahman ElMously; Haitham Eissa; Mohamed Dessouky; David Nairn; Mohab H. Anis (IDT, 2011)

A parametric DFM solution for analog circuits: Electrical driven hot spot detection, analysis and correction flow. - Rami F. Salem; Ahmed Arafa; Sherif Hany; Abdelrahman ElMously; Haitham Eissa; Mohamed Dessouky; David Nairn; Mohab H. Anis (SoCC, 2011)

Web-based analog design using tradeoff charts. - Ahmed Hamza 005; Andrew Philip; Mohamed Ali; Mohamed Dessouky; Mohamed Kassem (ICECS, 2012)

Channel mismatch background calibration for pipelined time interleaved ADCs. - Armia Mrassy; Mohamed Dessouky (ICECS, 2012)

Layout stress and proximity aware analog design methodology. - Ahmed Zein; Amr Tarek; Mohamed Bahr; Mohamed Dessouky; Haitham Eissa; Ahmed Ramadan; Amr Tosson (ICECS, 2012)

Schematic-driven physical verification: Fully automated solution for analog IC design. - Ahmed Arafa; Hend Wagieh; Rami Fathy Salem; John Ferguson; Doug Morgan; Mohab H. Anis; Mohamed Dessouky (SoCC, 2012)

Dr. Mohamed Sadek Eid 1938-2012. - Mohamed Dessouky (Comput. Ind. Eng., 2012)

A programmable 8-bit, 10MHz BW, 6.8mW, 200MSample/sec, 70dB SNDR VCO-based ADC using SC feedback for VCO linearization. - Waleed El-Halwagy; Mohamed Dessouky; Hassan El-Ghitani (ICECS, 2013)

Analysis and design of analog-based voltage controlled oscillator linearization technique. - Waleed El-Halwagy; Mohamed Dessouky; Hassan El-Ghitani (IDT, 2013)

Parametric DFM Solution for Analog Circuits: Electrical-Driven Hotspot Detection, Analysis, and Correction Flow. - Haitham Eissa; Rami Fathy Salem; Ahmed Arafa; Sherif Hany; Abdelrahman ElMously; Mohamed Dessouky; David Nairn; Mohab H. Anis (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Multi-device layout templates for nanometer analog design. - Mohannad Elshawy; Mohamed Dessouky; Sherif M. Saif; Sherif Mansour; Ed Petrus (IDT, 2014)

Exploiting satisfiability modulo theories for analog layout automation. - Sherif M. Saif; Mohamed Dessouky; Salwa M. Nassar; Hazem M. Abbas; M. Watheq El-Kharashi; Mohammad Abdulaziz (IDT, 2014)

The Connection-Then-Credit Flow Control Protocol for Networks-On-Chips: Implementation Trade-offs. - Mohamed Sallam; M. Watheq El-Kharashi; Mohamed Dessouky (NoCArc@MICRO, 2014)

System Verilog Assertion Debugging Based on Visualization, Simulation Results, and Mutation. - Moaz Mostafa; Mona Safar; M. Watheq El-Kharashi; Mohamed Dessouky (MTV, 2014)

Don't cares based dynamic test vector compaction in SAT-ATPG. - Kareem Habib; Mona Safar; Mohamed Dessouky; Ashraf Salem (MWSCAS, 2014)

A 8 Gbps 0.67mW 1 tap current integrating DFE in 40nm CMOS. - Ahmed Ismail; Sameh Ibrahim; Mohamed Dessouky (MWSCAS, 2014)

Analog layout constraints resolution and shape function generation using Satisfiability Modulo Theories. - Sherif M. Saif; Mohamed Dessouky; Hazem M. Abbas; M. Watheq El-Kharashi; Salwa M. Nassar (DTIS, 2015)

Procedural analog design automation using building block optimization. - Maged El-Sisi; Mohamed Dessouky (ICECS, 2015)

Incremental layout-aware analog design methodology. - Mohannad Elshawy; Mohamed Dessouky (ICECS, 2015)

An 8kb SRAM macro in 65nm for ultra-low voltage applications operating from 1.2V to 0.5V. - Mostafa F. Farid; Amgad A. Ghonem; Mohamed Dessouky (ICECS, 2015)

A 1V low-power low-noise biopotential amplifier based on flipped voltage follower. - Tamer Farouk; Mohamed M. Elkhatib; Mohamed Dessouky (ICECS, 2015)

Optimal design of 6T SRAM bitcells for ultra low-voltage operation. - Amgad A. Ghonem; Mostafa F. Farid; Mohamed Dessouky (ICECS, 2015)

A wideband 5 GHz digital PLL using a low-power two-step time-to-digital converter. - Ahmed Hamza 005; Sameh Ibrahim; Mohamed El-Nozahi; Mohamed Dessouky (ICECS, 2015)

Coupling capacitance extraction in through-silicon via (TSV) arrays. - Tarek Ramadan; Eslam Yahya; Mohamed Dessouky; Yehea I. Ismail (ICECS, 2015)

Structure optimization for efficient AlN piezoelectric energy harvesters. - Mostafa Shadoufa; Ahmed Emad; Maged Ghoneima; Mohamed A. E. Mahmoud; Mohamed Dessouky (ICECS, 2015)

Parameterized test patterns methodology for layout design rule checking verification. - Mohamed Tantawy; Rafik Guindi; Mohamed Dessouky; Mohamed Al-Imam (ICECS, 2015)

A low-temperature-coefficient curvature-compensated bandgap reference with mismatch attenuation. - Mahitab F. Eladwy; Sameh A. Ibrahim; Mohamed Dessouky (IDT, 2015)

A design flow to quantify and limit multiple patterning effects. - Mohammed Harb; Mohamed Dessouky (MWSCAS, 2015)

An 8Gbps discrete time linear equalizer in 40nm CMOS technology. - Ahmed Ismail; Sameh Ibrahim; Mohamed Dessouky (MWSCAS, 2015)

A low-power, 9-Bit, 1.2 ps resolution two-step time-to-digital converter in 65 nm CMOS. - Ahmed Hamza 005; Sameh Ibrahim; Mohamed El-Nozahi; Mohamed Dessouky (NEWCAS, 2015)

SystemVerilog assertion debugging: A visualization and pattern matching model. - Moaz Mostafa; Mona Safar; M. Watheq El-Kharashi; Mohamed Dessouky (PACRIM, 2015)

Pareto front analog layout placement using Satisfiability Modulo Theories. - Sherif M. Saif; Mohamed Dessouky; M. Watheq El-Kharashi; Hazem M. Abbas; Salwa M. Nassar (DATE, 2016)

12-Gb/s low-power voltage-mode driver for multi-standard serial-link applications. - Mohamed Megahed; Mohamed R. M. Rizk; Sameh A. Ibrahim; Mohamed Dessouky (ICECS, 2016)

Optimally matched current mirror layout pattern generation using genetic optimization. - Islam Nashaat Salah El Din; Mohamed Dessouky; Hazem Said (ICM, 2016)

A simple model for on-chip microstrip transmission lines in millimeter wave circuits. - Shrouk Shafie; Mona El-Sabagh; Mohamed Dessouky; Marwah Shafee; Sherif Hammouda; Hazem Hegazy (ICM, 2016)

Regression modeling for subset selection in rare-event statistical circuit simulation. - Reem El-Adawi; Mohamed Dessouky (IDT, 2016)

Stress-aware analog layout devices pattern generation. - Khaled El-Kenawy; Mohamed Dessouky (IDT, 2016)

Accuracy-improved coupling capacitance model for through-silicon via (TSV) arrays using dimensional analysis. - Tarek Ramadan; Eslam Yahya; Mohamed Dessouky; Yehea Ismail (ISCAS, 2016)

Transaction Level Power Modeling (TLPM) Methodology. - Amr B. Darwish; Magdy A. El-Moursy; Mohamed Dessouky (MTV, 2016)

Modeling and analysis of stretching strain in clamped-clamped beams for energy harvesting. - Ahmed Emad; Mohamed A. E. Mahmoud; Maged Ghoneima; Mohamed Dessouky (MWSCAS, 2016)

Optimization of the output power of a frequency-up conversion piezoelectric energy harvester. - Mostafa Shadoufa; Mohamed Mahmoud; Maged Ghoneima; Mohamed Dessouky (MWSCAS, 2016)

Analog layout placement exploiting sub-block shape functions. - Khaled El-Kenawy; Inas Mohammed; Mohamed Dessouky (SMACD, 2016)

A Platform for Placement of Analog Integrated Circuits Using Satisfiability Modulo Theories. - Sherif M. Saif; Mohamed Dessouky; M. Watheq El-Kharashi; Hazem M. Abbas; Salwa M. Nassar (J. Circuits Syst. Comput., 2016)

Power pre-characterized meshing algorithm for finite element thermal analysis of integrated circuits. - Shohdy Abdelkader; Alaa ELRouby; Mohamed Dessouky (DATE, 2017)

Monte Carlo general sample classification for rare circuit events using Random Forest. - Reem El-Adawi; Mohamed Dessouky (SMACD, 2017)

Analog layout placement retargeting using Satisfiability Modulo Theories. - Aya Mohamed 002; Mohamed Dessouky; Sherif M. Saif (SMACD, 2017)

Forty years of Computers & Industrial Engineering: A bibliometric analysis. - Christian A. Cancino; José M. Merigó; Freddy Coronado; Yasser Dessouky; Mohamed Dessouky (Comput. Ind. Eng., 2017)

Pyramidal Neuron Architectures for AcceleratingDeep Neural Networks on FPGA. - Hossam O. Ahmed; Maged Ghoneima; Mohamed Dessouky (AHS, 2018)

Affirming Hardware Design Authenticity Using Fragile IP Watermarking. - Samar M. Hussein Shukry; Amr Talaat Abdel-Hamid; Mohamed Dessouky (ICCA, 2018)

High-Speed 2D Parallel MAC Unit Hardware Accelerator for Convolutional Neural Network. - Hossam O. Ahmed; Maged Ghoneima; Mohamed Dessouky (IntelliSys (1), 2018)

Mismatch-Aware Placement of Device Arrays Using Genetic Optimization. - Islam Nashaat; Inas Mohammed; Mohamed Dessouky; Hazem Said (SMACD, 2018)

Systematic design and optimization of operational transconductance amplifier using gm/ID design methodology. - Mostafa N. Sabry; Hesham Omran; Mohamed Dessouky (Microelectron. J., 2018)

Development of a Generic and a Reconfigurable UVM-Based Verification Environment for SoC Buses. - Alaa Hussien; Samar Mohamed; Mohamed Soliman; Hager Mostafa; Khaled Salah 001; Mohamed Dessouky; Hassan Mostafa (ICM, 2019)

Gm-Free Assisted Opamp Technique for Continuous Time Delta-Sigma Modulators. - Ahmed ElShater; Calvin Y. Lee; Praveen Kumar Venkatachala; Mohamed Dessouky; Un-Ku Moon (ISCAS, 2019)

A Dynamic Power Reduction Methodology based on Reducing Output Transition Rate. - Moaz Mostafa; Ahmed M. Zaki; M. Watheq El-Kharashi; Mohamed Dessouky (PACRIM, 2019)

PLL Real Number Modeling in SystemVerilog. - Mina Louis; Mohamed Dessouky; Ashraf Salem (SMACD, 2019)

Analog Layout Placement Based on Unit Elements and Routing Channel Estimation. - Sherif Ahmed Mohamed; Mohamed Dessouky; Fady Atef Naguib; Soha Hamed (SMACD, 2019)

Systolic-based pyramidal neuron accelerator blocks for convolutional neural network. - Hossam O. Ahmed; Maged Ghoneima; Mohamed Dessouky (Microelectron. J., 2019)

Reconfigurable Systolic-based Pyramidal Neuron Block for CNN Acceleration on FPGA. - Hossam O. Ahmed; Maged Ghoneima; Mohamed Dessouky (ICSET, 2020)

Electrostatic Discharge Physical Verification of 2.5D/3D Integrated Circuits. - Dina Medhat; Mohamed Dessouky; DiaaEldin Khalil (ISQED, 2020)

Fragile HFSM Watermarking Hardware IP Authentication CAD Tool. - Samar M. Hussein Shukry; Amr Talaat Abdel-Hamid; Mohamed Dessouky (MOCAST, 2020)

IPXACT-Based RTL Generation Tool. - Ahmad El-Shiekh; Ahmad El-Alfy; Ahmad Ammar; Mohamed Gamal; Mohamed Dessouky; Khaled Salah 001; Hassan Mostafa (NILES, 2020)

A fabrication of a low-power low-noise neural recording amplifier based on flipped voltage follower. - Tamer Farouk; Mohamed Dessouky; Mohamed M. Elkhatib (Microelectron. J., 2020)

Digital ASIC Implementation of RISC-V: OpenLane and Commercial Approaches in Comparison. - Sarah Hesham; Mohamed Shalan; M. Watheq El-Kharashi; Mohamed Dessouky (MWSCAS, 2021)

A 6.4 GHz Continuous-Time ΣΔ ADC Using Body-Biased Feedforward Op-Amps in 28nm-FDSOI. - Marco A. Saif; Mohamed Dessouky; Hassan Aboushady (MWSCAS, 2021)

A Novel Flow for Reducing Dynamic Power and Conditional Performance Improvement. - Moaz Mostafa; M. Watheq El-Kharashi; Mohamed Dessouky; Ahmed M. Zaki (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Direct Digital Frequency Synthesizer Modeling with a Re-configurable DAC Evaluation for Electrochemical Impedance Spectroscopy. - Amr Farouk; Ahmed Naguib; Islam Mostafa; Mohamed Dessouky (IEEE SENSORS, 2022)

Common mode control loop for current mode logic-based circuits in FD-SOI technology. - Marco A. Saif; Mohamed Dessouky; Hassan Aboushady (ISCAS, 2022)

Systematic Design For Multistage Feed-forward Op-amp For High-Speed Continuous-Time ∑Δ ADCs. - Marco A. Saif; Alhassan Sayed; Michel Vasilevski; Mohamed Dessouky; Hassan Aboushady (ISCAS, 2022)

A General Algorithm for Loop-gain and TDC-resolution Optimization in an ADPLL with a 2-bit TDC Phase detector. - Abdelrahman G. Habib; Mohamed Dessouky (SOCC, 2022)

Design and Implementation of an Improved Variable Step-Size NLMS-Based Algorithm for Acoustic Noise Cancellation. - Mohamed Salah; Mohamed Dessouky; Bassant Abdelhamid (Circuits Syst. Signal Process., 2022)

CLRGAN: Compressed Learning and Reconstruction Using GAN for Alzheimer's Disease. - Nada Nader; Mohamed Dessouky; Bassant Abdelhamid (NILES, 2023)

A Resolution Control Loop for TDC-Based Phase Detectors in ADPLLs. - Abdelrahman G. Habib; Mohamed Dessouky; Ahmed Naguib (IEEE Access, 2023)

Increasing the Modeling Accuracy of an Analog PLL Device Executed With an Event-Driven Simulator. - Mariam Maurice; Mohamed Dessouky; Ashraf Salem (IEEE Access, 2023)

Cycle Slipping Cancellation in Bang-Bang PLLs. - Sherihan K. Fahmi; Mohamed Dessouky; Mohamed Mobarak; Mohamed A. Y. Abdalla (NILES, 2024)

A 0.05%-0.08% THD, 762.9 Hz-10 MHz direct digital frequency synthesizer using a reconfigurable DAC for electrochemical impedance spectroscopy measurements. - Amr Farouk; Mohamed Dessouky; Ahmed Naguib (Int. J. Circuit Theory Appl., 2025)