Two-Level Emitter-Function Logic Structures for Logic-in-Memory Computers. - Mohamed I. Elmasry; Philip M. Thompson (IEEE Trans. Computers, 1975)

Logic Design Using EFL Structures. - Mohamed I. Elmasry (IEEE Trans. Computers, 1976)

WATPC: A Computer-Aided Design Package for Digital Bipolar Integrated Circuits. - A. R. Teene; Mohamed I. Elmasry; David J. Roulston (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1982)

The icewater language and interpreter. - Patrick A. D. Powell; Mohamed I. Elmasry (DAC, 1984)

The user interface and program structure of a graphical VLSI layout editor. - Kevin S. B. Szabó; Mohamed I. Elmasry (CHI, 1987)

Symbolic Layout for Bipolar and MOS VLSI. - Kevin S. B. Szabó; James M. Leask; Mohamed I. Elmasry (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987)

VLSI Design Synthesis with Testability. - Catherine H. Gebotys; Mohamed I. Elmasry (DAC, 1988)

Automatic synthesis of a multi-bus architecture for DSP. - Baher Haroun; Mohamed I. Elmasry (ICCAD, 1988)

Integrated design and test synthesis. - Catherine H. Gebotys; Mohamed I. Elmasry (ICCD, 1988)

ACE: A Hierarchical Graphical Interface for Architectual Synthesis. - O. A. Buset; Mohamed I. Elmasry (DAC, 1989)

Architectural synthesis for DSP silicon compilers. - Baher Haroun; Mohamed I. Elmasry (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989)

Integration of algorithmic VLSI synthesis with testability incorporation. - Catherine H. Gebotys; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1989)

SPAID: an architectural synthesis tool for DSP custom applications. - Baher Haroun; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1989)

A fast learning technique for the multilayer perceptron. - Waleed Fakhr; Mohamed I. Elmasry (IJCNN, 1990)

Scaling of digital BiCMOS circuits. - Abdellatif Bellaouar; Sherif H. K. Embabi; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1990)

Simultaneous Scheduling and Allocation for Cost Constrained Optimal Architectural Synthesis. - Catherine H. Gebotys; Mohamed I. Elmasry (DAC, 1991)

New full-voltage-swing BiCMOS buffers. - Sherif H. K. Embabi; Abdellatif Bellaouar; Mohamed I. Elmasry; Robert A. Hadaway (IEEE J. Solid State Circuits, 1991)

Analysis and optimization of BiCMOS digital circuit structures. - Sherif H. K. Embabi; Abdellatif Bellaouar; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1991)

BiCMOS nonthreshold logic for high-speed low-power applications. - Abdellatif Bellaouar; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1991)

Testing and design for testability of BiCMOS logic circuits. - Aly Ezzat Salama; Mohamed I. Elmasry (VTS, 1992)

STAIC: an interactive framework for synthesizing CMOS and BiCMOS analog circuits. - J. Paul Harvey; Mohamed I. Elmasry; Bosco Leung (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1992)

The digi-neocognitron: a digital neocognitron neural network model for VLSI. - Brian A. White; Mohamed I. Elmasry (IEEE Trans. Neural Networks, 1992)

Multiemitter BiCMOS CML circuits. - Muhammad E. S. Elrabaa; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1992)

Optimal synthesis of high-performance architectures. - Catherine H. Gebotys; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1992)

Design and optimization of buffer chains and logic circuits in a BiCMOS environment. - Muhammad E. S. Elrabaa; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1992)

Analytical and numerical analyses of the delay time of BiCMOS structures. - Samir S. Rofail; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1992)

Fault characterization, testing considerations, and design for testability of BiCMOS logic circuits. - Aly Ezzat Salama; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1992)

Minimum description length pruning and maximum mutual information training of adaptive probabilistic neural networks. - Waleed Fakhr; Mohamed I. Elmasry (ICNN, 1993)

Analog neural network building blocks based on current mode subthreshold operation. - L. Song; Mohamed I. Elmasry; Anthony Vannelli (ISCAS, 1993)

Modular switched-resistor ANN chip for character recognition using novel parallel VLSI architecture. - Sameh Ebrahim Rehan; Mohamed I. Elmasry (Neural Parallel Sci. Comput., 1993)

Global optimization approach for architectural synthesis. - Catherine H. Gebotys; Mohamed I. Elmasry (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

A new model for bipolar transistors at high current. - Richard X. Gu; Mohamed I. Elmasry; David J. Roulston (IEEE J. Solid State Circuits, 1993)

Analysis of latchup and parasitic effects in merged BiCMOS structures. - Samir S. Rofail; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1993)

Low-power differential CML and ECL BiCMOS circuit techniques. - Khaled M. Sharaf; Mohamed I. Elmasry (Great Lakes Symposium on VLSI, 1994)

Vowel classification using a neural predictive HMM: a discriminative training approach. - Khaled Hassanein; Li Deng 001; Mohamed I. Elmasry (ICASSP (2), 1994)

An All-N-Logic High-Speed Single-Phase Dynamic CMOS Logic. - Richard X. Gu; Mohamed I. Elmasry (ISCAS, 1994)

BiCMOS Active-Pull-Down Non-Threshold Logic Cicuits for High-Speed Low-Power Applications. - Khaled M. Sharaf; Mohamed I. Elmasry (ISCAS, 1994)

Fuzzy Clustering Neural Network (FCNN): Competitive Learning and Parallel Architecture. - David Zhang 001; Mohamed Kamel; Mohamed I. Elmasry (J. Intell. Fuzzy Syst., 1994)

Analysis of the correlation structure for a neural predictive model with application to speech recognition. - Li Deng 001; Khaled Hassanein; Mohamed I. Elmasry (Neural Networks, 1994)

Pipelined architecture for neural-network-based speech recognition. - David Zhang 001; Li Deng 001; Mohamed I. Elmasry (Neural Parallel Sci. Comput., 1994)

Mixed analog/digital hardware synthesis of artificial neural networks. - Arun Achyuthan; Mohamed I. Elmasry (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994)

An accurate analytical propagation delay model for high-speed CML bipolar circuits. - Khaled M. Sharaf; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1994)

Novel low-voltage low-power full-swing BiCMOS circuits. - Muhammad E. S. Elrabaa; Michael S. Obrecht; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1994)

Schottky merged BiCMOS structures. - Samir S. Rofail; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1994)

Full-swing Schottky BiCMOS/BiNMOS and the effects of operating frequency and supply voltage scaling. - Abdellatif Bellaouar; Issam S. Abu-Khater; Mohamed I. Elmasry; A. Chikima (IEEE J. Solid State Circuits, 1994)

Highly testable design of BiCMOS logic circuits. - Mohamed Y. Osman; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1994)

High-speed dynamic reference voltage (DRV) CMOS/ECL interface circuits. - Richard X. Gu; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1994)

Circuit/architecture for low-power high-performance 32-bit adder. - Issam S. Abu-Khater; Abdellatif Bellaouar; Mohamed I. Elmasry; Ran-Hong Yan (Great Lakes Symposium on VLSI, 1995)

Power Dissipation in Deep Submicron CMOS Digital Circuits. - Richard X. Gu; Mohamed I. Elmasry (ISCAS, 1995)

A programmable neural network architecture using BiCMOS technology. - David Zhang 001; Richard X. Gu; Mohamed I. Elmasry (Neural Parallel Sci. Comput., 1995)

TRASIM: compact and efficient two-dimensional transient simulator for arbitrary planar semiconductor devices. - Michael S. Obrecht; Mohamed I. Elmasry; Edwin L. Heasell (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

Differential BiCMOS logic circuits: fault characterization and design-for-testability. - Shaahin Hessabi; Mohamed Y. Osman; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 1995)

Novel high speed circuit structures for BiCMOS environment. - Richard X. Gu; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1995)

Low-power CMOS/BiCMOS drivers and receivers for on-chip interconnects. - Abdellatif Bellaouar; Issam S. Abu-Khater; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1995)

Bootstrapped full-swing BiCMOS/BiNMOS logic circuits for 1.2-3.3 V supply voltage regime. - Abdellatif Bellaouar; Mohamed I. Elmasry; Sherif H. K. Embabi (IEEE J. Solid State Circuits, 1995)

Active-pull-down nonthreshold logic BiCMOS circuits for high-speed low-power applications. - Khaled M. Sharaf; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1995)

Low-Power Implementation of Discrete Cosine Transform. - Emad N. Farag; Mohamed I. Elmasry (Great Lakes Symposium on VLSI, 1996)

Low-power subband coding algorithm. - Emad N. Farag; Mohamed I. Elmasry (ICASSP, 1996)

A comparison of CMOS implementations of an asynchronous circuits primitive: the C-element. - Maitham Shams; Jo C. Ebergen; Mohamed I. Elmasry (ISLPED, 1996)

A Digital Perceptron Learning Implementation with Look-up Table Feedback Layer. - David Zhang 001; Mohamed I. Elmasry (J. Circuits Syst. Comput., 1996)

Circuit techniques for CMOS low-power high-performance multipliers. - Issam S. Abu-Khater; Abdellatif Bellaouar; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1996)

All-N-logic high-speed true-single-phase dynamic CMOS logic. - Richard X. Gu; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1996)

Power dissipation analysis and optimization of deep submicron CMOS digital circuits. - Richard X. Gu; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1996)

Analysis and optimization of series-gated CML and ECL high-speed bipolar circuits. - Khaled M. Sharaf; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 1996)

Mapping neural networks onto systolic arrays. - David Zhang 001; Mohamed I. Elmasry (Neural Parallel Sci. Comput., 1996)

A parallel digital layered perceptrons implementation. - David Zhang 001; Mohamed I. Elmasry (Neural Parallel Sci. Comput., 1996)

Optimizing CMOS Implementations of the C-element. - Maitham Shams; Jo C. Ebergen; Mohamed I. Elmasry (ICCD, 1997)

A programmable power-efficient decimation filter for software radios. - Emad N. Farag; Ran-Hong Yan; Mohamed I. Elmasry (ISLPED, 1997)

Low-power BiCMOS circuits for high-speed interchip communication. - Muhammad E. S. Elrabaa; Mohamed I. Elmasry; Duljit S. Malhi (IEEE J. Solid State Circuits, 1997)

VLSI compressor design with applications to digital neural networks. - David Zhang 001; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 1997)

A Low-Power High-Performance Embedded SRAM Macrocell. - Amr M. Fahim; Muhammad M. Khellah; Mohamed I. Elmasry (Great Lakes Symposium on VLSI, 1998)

Effective Capacitance Macro-Modelling for Architectural-Level Power Estimation. - Muhammad M. Khellah; Mohamed I. Elmasry (Great Lakes Symposium on VLSI, 1998)

Low-Power Design of Finite Field Multipliers for Wireless Applications. - Amr G. Wassal; M. Anwarul Hasan; Mohamed I. Elmasry (Great Lakes Symposium on VLSI, 1998)

Modeling and comparing CMOS implementations of the C-element. - Maitham Shams; Jo C. Ebergen; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Transient Phenomena in High Speed Bipolar Devices. - Michael S. Obrecht; Edwin L. Heasell; Jirí Vlach; Mohamed I. Elmasry (VLSI Design, 1998)

A low-power direct digital frequency synthesizer architecture for wireless communications. - Abdellatif Bellaouar; Michael S. Obrecht; Amr M. Fahim; Mohamed I. Elmasry (CICC, 1999)

Fully integrated low phase-noise PLLs using closed-loop voltage-to-frequency converter architectures. - Amr N. Hafez; Mohamed I. Elmasry (CICC, 1999)

A Novel Low Power Low Phase-Noise PLL Architecture for Wireless Transceivers. - Amr N. Hafez; Mohamed I. Elmasry (Great Lakes Symposium on VLSI, 1999)

Delay Optimization of CMOS Logic Circuits Using Closed-Form Expressions. - Maitham Shams; Mohamed I. Elmasry (ICCD, 1999)

A Fast Parametric Model for Contact-Substrate Coupling. - Nasser Masoumi; Mohamed I. Elmasry; Safieddin Safavi-Naeini (VLSI, 1999)

A Low-Voltage High-Performance Differential Static Logic (LVDSL) family. - Amr M. Fahim; Mohamed I. Elmasry (ISCAS (1), 1999)

A low-power CMOS frequency synthesizer design methodology for wireless applications. - Amr M. Fahim; Mohamed I. Elmasry (ISCAS (2), 1999)

A low power monolithic subsampled phase-locked loop architecture for wireless transceivers. - Amr N. Hafez; Mohamed I. Elmasry (ISCAS (2), 1999)

A formulation for quick evaluation and optimization of digital CMOS circuits. - Maitham Shams; Mohamed I. Elmasry (ISCAS (6), 1999)

Differential PLL for wireless applications using differential CMOS LC-VCO and differential charge pump. - Ayman ElSayed; Akbar Ali; Mohamed I. Elmasry (ISLPED, 1999)

Effect of technology scaling on digital CMOS logic styles. - Mohamed W. Allam; Mohab H. Anis; Mohamed I. Elmasry (CICC, 2000)

Dynamic current mode logic (DyCML), a new low-power high-performance logic family. - Mohamed W. Allam; Mohamed I. Elmasry (CICC, 2000)

A fully-integrated low phase-noise nested-loop PLL for frequency synthesis. - Amr N. Hafez; Mohamed I. Elmasry (CICC, 2000)

Low power high speed analog-to-digital converter for wireless communications. - A. E. Hussein; Mohamed I. Elmasry (ACM Great Lakes Symposium on VLSI, 2000)

An Efficient and Accurate Model for RF/Microwave Spiral Inductors Using Microstrip Lines Theory. - Nasser Masoumi; Safieddin Safavi-Naeini; Mohamed I. Elmasry (ICCD, 2000)

A contention-free domino logic for scaled-down CMOS technologies with ultra low threshold voltages. - Muhammad E. S. Elrabaa; Mohab H. Anis; Mohamed I. Elmasry (ISCAS, 2000)

High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies. - Mohamed W. Allam; Mohab Anis; Mohamed I. Elmasry (ISLPED, 2000)

Low-power direct digital frequency synthesis for wireless communications. - Abdellatif Bellaouar; Michael S. O'brecht; Amr M. Fahim; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 2000)

Fast and efficient parametric modeling of contact-to-substratecoupling. - Nasser Masoumi; Mohamed I. Elmasry; Safieddin Safavi-Naeini (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

Low-power design of decimation filters for a digital IF receiver. - Brian A. White; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 2000)

Split-Gate Logic circuits for multi-threshold technologies. - Muhammad E. S. Elrabaa; Mohamed I. Elmasry (ISCAS (4), 2001)

Dynamic current mode logic (DyCML): a new low-power high-performance logic style. - Mohamed W. Allam; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 2001)

A low-power high-performance current-mode multiport SRAM. - Muhammad M. Khellah; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique. - Mohab Anis; Mohamed Mahmoud; Mohamed I. Elmasry; Shawki Areibi (DAC, 2002)

A Novel Analytical Model for Evaluation of Substrate Crosstalk in VLSI Circuits. - Nasser Masoumi; Mohamed I. Elmasry; Safieddin Safavi-Naeini; Haydar Hadi (DELTA, 2002)

Self-timed MOS current mode logic for digital applications. - Mohab Anis; Mohamed I. Elmasry (ISCAS (5), 2002)

Low-power register-exchange Viterbi decoder for high-speed wireless communications. - D. A. F. Ei-Dib; Mohamed I. Elmasry (ISCAS (5), 2002)

Fractional-N frequency synthesizer for wireless communications. - A. E. Hussein; Mohamed I. Elmasry (ISCAS (4), 2002)

A methodology for substrate crosstalk evaluation for system-on-a-chip. - Nasser Masoumi; Safieddin Safavi-Naeini; Mohamed I. Elmasry (Integr. Comput. Aided Eng., 2002)

Low-power high-performance arithmetic circuits and architectures. - Amr M. Fahim; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 2002)

Energy-efficient noise-tolerant dynamic styles for scaled-down CMOS and MTCMOS technologies. - Mohab Anis; Mohamed W. Allam; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Design and optimization of multithreshold CMOS (MTCMOS) circuits. - Mohab Anis; Shawki Areibi; Mohamed I. Elmasry (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003)

A wideband sigma-delta phase-locked-loop modulator for wireless applications. - Amr M. Fahim; Mohamed I. Elmasry (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A fast lock digital phase-locked-loop architecture for wireless applications. - Amr M. Fahim; Mohamed I. Elmasry (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A novel matrix-based lumped-element analysis method for CMOS distributed amplifiers. - Kambiz K. Moez; Mohammad Ibrahim Elmasry (ISCAS (1), 2004)

Analysis and design of low-power multi-threshold MCML. - Hassan Hassan 001; Mohab Anis; Mohamed I. Elmasry (SoCC, 2004)

Impact of technology scaling on RF CMOS. - Hassan Hassan 001; Mohab Anis; Mohamed I. Elmasry (SoCC, 2004)

MOS current mode logic: design, optimization, and variability. - Hassan Hassan 001; Mohab Anis; Mohamed I. Elmasry (SoCC, 2004)

Analog-to-digital conversion for SONET OC-192. - Ayman H. Ismail; Mohamed I. Elmasry (SoCC, 2004)

POMR: a power-optimal maze routing methodology. - Ahmed Youssef 001; Mohab Anis; Mohamed I. Elmasry (SoCC, 2004)

Modified register-exchange Viterbi decoder for low-power wireless communications. - Dalia A. El-Dib; Mohamed I. Elmasry (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Phase-domain fractional-N frequency synthesizers. - Ayman ElSayed; Mohamed I. Elmasry (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Activity Packing in FPGAs for Leakage Power Reduction. - Hassan Hassan 001; Mohab Anis; Antoine El Daher; Mohamed I. Elmasry (DATE, 2005)

A leakage-aware CAD flow for MTCMOS FPGA architectures (abstract only). - Hassan Hassan 001; Mohab Anis; Mohamed I. Elmasry (FPGA, 2005)

LAP: a logic activity packing methodology for leakage power-tolerant FPGAs. - Hassan Hassan 001; Mohab Anis; Mohamed I. Elmasry (ISLPED, 2005)

A Low-Power Partitioning Methodology by Maximizing Sleep Time and Minimizing Cut Nets. - Payam Ghafari; Ehsan Mirhadi; Mohab Anis; Shawki Areibi; Mohamed I. Elmasry (IWSOC, 2005)

Design and optimization of MOS current mode logic for parameter variations. - Hassan Hassan 001; Mohab Anis; Mohamed I. Elmasry (Integr., 2005)

Memoryless Viterbi decoder. - Dalia A. El-Dib; Mohamed I. Elmasry (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

MOS current mode circuits: analysis, design, and variability. - Hassan Hassan 001; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 2005)

POMR: a power-aware interconnect optimization methodology. - Ahmed Youssef 001; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 2005)

A 10-GHz 15-dB four-stage distributed amplifier in 0.18 µm CMOS process. - Kambiz K. Moez; Mohamed I. Elmasry (DATE, 2006)

A termination technique for the averaging network of flash ADC's. - Ayman H. Ismail; Mohamed I. Elmasry (ISCAS, 2006)

A novel loss compensation technique for broadband CMOS distributed amplifiers. - Kambiz K. Moez; Mohammad Ibrahim Elmasry (ISCAS, 2006)

Dynamic Standby Prediction for Leakage Tolerant Microprocessor Functional Units. - Ahmed Youssef 001; Mohab Anis; Mohamed I. Elmasry (MICRO, 2006)

Impact of technology scaling and process variations on RF CMOS devices. - Hassan Hassan 001; Mohab Anis; Mohamed I. Elmasry (Microelectron. J., 2006)

Low-power multi-threshold MCML: Analysis, design, and variability. - Hassan Hassan 001; Mohab Anis; Mohamed I. Elmasry (Microelectron. J., 2006)

Lumped-element analysis and design of CMOS distributed amplifiers with image impedance termination. - Kambiz K. Moez; Mohamed I. Elmasry (Microelectron. J., 2006)

A Timing-Driven Algorithm for Leakage Reduction in MTCMOS FPGAs. - Hassan Hassan 001; Mohab Anis; Mohamed I. Elmasry (ASP-DAC, 2007)

A Low-Power Multi-Pin Maze Routing Methodology. - Ahmed Youssef 001; Tor Myklebust; Mohab Anis; Mohamed I. Elmasry (ISQED, 2007)

A 10dB 44GHz Loss-Compensated CMOS Distributed Amplifier. - Kambiz K. Moez; Mohamed I. Elmasry (ISSCC, 2007)

A 6-Bit 1.6-GS/sLow-Power Wideband Flash ADC Converter in 0.13-µm CMOS Technology. - Ayman H. Ismail; Mohamed I. Elmasry (IEEE J. Solid State Circuits, 2008)

Input Vector Reordering for Leakage Power Reduction in FPGAs. - Hassan Hassan 001; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Analysis of the Flash ADC Bandwidth-Accuracy Tradeoff in Deep-Submicron CMOS Technologies. - Ayman H. Ismail; Mohamed I. Elmasry (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A Low-Noise CMOS Distributed Amplifier for Ultra-Wide-Band Applications. - Kambiz K. Moez; Mohamed I. Elmasry (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A Comparative Study Between Static and Dynamic Sleep Signal Generation Techniques for Leakage Tolerant Designs. - Ahmed Youssef 001; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Comparative Analysis of Timing Yield Improvement under Process Variations of Flip-Flops Circuits. - Hassan Mostafa; Mohab Anis; Mohamed I. Elmasry (ISVLSI, 2009)

A New Loss Compensation Technique for CMOS Distributed Amplifiers. - Kambiz K. Moez; Mohamed I. Elmasry (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

Total Power Modeling in FPGAs Under Spatial Correlation. - Hassan Hassan 001; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Comparative analysis of power yield improvement under process variation of sub-threshold flip-flops. - Hassan Mostafa; Mohab Anis; Mohamed I. Elmasry (ISCAS, 2010)

Statistical timing yield improvement of dynamic circuits using negative capacitance technique. - Hassan Mostafa; Mohab Anis; Mohamed I. Elmasry (ISCAS, 2010)

Discrete cooperative particle swarm optimization for FPGA placement. - Mohammed El-Abd; Hassan Hassan 001; Mohab Anis; Mohamed S. Kamel; Mohamed I. Elmasry (Appl. Soft Comput., 2010)

A Design-Oriented Soft Error Rate Variation Model Accounting for Both Die-to-Die and Within-Die Variations in Submicrometer CMOS SRAM Cells. - Hassan Mostafa; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

A Power-Efficient Multipin ILP-Based Routing Technique. - Ahmed Youssef 001; Zhen Yang 006; Mohab Anis; Shawki Areibi; Anthony Vannelli; Mohamed I. Elmasry (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

On the Power Management of Simultaneous Multithreading Processors. - Ahmed Youssef 001; Mohamed Zahran 001; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 2010)

Novel Timing Yield Improvement Circuits for High-Performance Low-Power Wide Fan-In Dynamic OR Gates. - Hassan Mostafa; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Adaptive Body Bias for Reducing the Impacts of NBTI and Process Variations on 6T SRAM Cells. - Hassan Mostafa; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Analytical Soft Error Models Accounting for Die-to-Die and Within-Die Variations in Sub-Threshold SRAM Cells. - Hassan Mostafa; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A Novel Low Area Overhead Direct Adaptive Body Bias (D-ABB) Circuit for Die-to-Die and Within-Die Variations Compensation. - Hassan Mostafa; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A Bias-Dependent Model for the Impact of Process Variations on the SRAM Soft Error Immunity. - Hassan Mostafa; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 2011)

On-Chip Process Variations Compensation Using an Analog Adaptive Body Bias (A-ABB). - Hassan Mostafa; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Negative capacitance circuits for process variations compensation and timing yield improvement. - Hassan Mostafa; Mohab Anis; Mohamed I. Elmasry (ICECS, 2013)

Statistical SRAM Read Access Yield Improvement Using Negative Capacitance Circuits. - Hassan Mostafa; Mohab Anis; Mohamed I. Elmasry (IEEE Trans. Very Large Scale Integr. Syst., 2013)

A 16-bit high-speed low-power hybrid adder. - Assem S. Hussein; Vincent C. Gaudet; Hassan Mostafa; Mohamed I. Elmasry (ICM, 2016)

On the Fault Tolerance of Stochastic Decoders. - Assem S. Hussein; Mohamed I. Elmasry; Vincent C. Gaudet (ISMVL, 2017)

A Teaching Assistant for Microelectronic Circuits Problems. - Salam I. Nachawi; Vincent C. Gaudet; Mohamed I. Elmasry (IISA, 2021)