A 500 MS/s 6 bits delay line ADC with inherit sample & hold. - Ali H. Hassan; Maged Ali; Nabil Mohammed; Ahmed Ali 005; Mohammed Hassoubh; M. Wagih Ismail; Mohammed Refky; Hassan Mostafa (ICM, 2014)

A 4-bit 6GS/s time-based analog-to-digital converter. - Assem S. Hussein; Mahmoud Fawzy; M. Wagih Ismail; Mohamed Refky; Hassan Mostafa (ICM, 2014)

A low-power high-speed charge-steering comparator for high-speed applications. - Ali H. Hassan; Mohamed M. Aboudina; Mohamed Refky (NEWCAS, 2016)

A 1 GS/s 6-bit time-based analog-to-digital converter (T-ADC) for front-end receivers. - Ali H. Hassan; Ahmed Ali 005; M. Wagih Ismail; Mohamed Refky; Yehea Ismail; Hassan Mostafa (MWSCAS, 2017)

FPGA-based Ethernet Switch for NCS with Partial Fault Tolerance. - Gehad I. Alkady; Tarek K. Refaat; Markus Rentschler; Ramez M. Daoud; Hassanein H. Amer; Hassan H. Halawa; Kawther Alshureify; Ihab Adly; Hany M. ElSayed; Manar N. Shaker; Mohamed Refky (ICM, 2019)

A 0.002-mm2 8-bit 1-MS/s low-power time-based DAC (T-DAC). - Ali H. Hassan; Hassan Mostafa; Mohamed Refky; Khaled N. Salama; Ahmed M. Soliman (IET Circuits Devices Syst., 2021)

A Systematic Literature Review on Binary Neural Networks. - Ratshih Sayed; Haytham Azmi; Heba A. Shawkey; Ahmed H. Khalil; Mohamed Refky (IEEE Access, 2023)