NOA'S-Arc: NISC based, optimized array scalable architecture. - Mohamed Wasfy Hassan; Ahmed A. Abouel Farag; Yasser Y. Hanafy (MWSCAS, 2013)

High Performance Sparse LU Solver FPGA Accelerator Using a Static Synchronous Data Flow Model. - Mohamed W. Hassan; Ahmed E. Helal; Yasser Y. Hanafy (FCCM, 2015)

Hardware accelerated SAT solvers - A survey. - Ali Asgar Sohanghpurwala; Mohamed W. Hassan; Peter Athanas (J. Parallel Distributed Comput., 2017)

Exploring FPGA-specific Optimizations for Irregular OpenCL Applications. - Mohamed W. Hassan; Ahmed E. Helal; Peter M. Athanas; Wu-Chun Feng; Yasser Y. Hanafy (ReConFig, 2018)

C to D-Wave: A High-level C Compilation Framework for Quantum Annealers. - Mohamed W. Hassan; Scott Pakin; Wu-chun Feng (HPEC, 2019)

MetaCL: Automated "Meta" OpenCL Code Generation for High-Level Synthesis on FPGA. - Paul Sathre; Atharva Gondhalekar; Mohamed W. Hassan; Wu-Chun Feng (HPEC, 2020)

Domain-Specific Modeling and Optimization for Graph Processing on FPGAs. - Mohamed W. Hassan; Peter M. Athanas; Yasser Y. Hanafy (ARC, 2021)

Graph Analytics on Hybrid System (GAHS) Case Study: PageRank. - Mohamed W. Hassan; Peter M. Athanas (IPDPS Workshops, 2021)

Using Workload Characterization to Guide High Performance Graph Processing. - Mohamed W. Hassan (2021)

Signal Detection for Large MIMO Systems Using Sphere Decoding on FPGAs. - Mohamed W. Hassan; Adel Dabah; Hatem Ltaief; Suhaib A. Fahmy (IPDPS, 2023)

High Throughput Massive MIMO Signal Decoding Using Multi-Level Tree Search on FPGAs. - Mohamed W. Hassan; Hatem Ltaief; Suhaib A. Fahmy (FCCM, 2024)