Ultralow-power SRAM technology. - Randy W. Mann; W. W. (Bill) Abadeer; Matthew J. Breitwisch; O. Bula; Jeff S. Brown; Bryant C. Colwill; Peter E. Cottrell; William T. Crocco Jr.; Stephen S. Furkay; Michael J. Hauser; Terence B. Hook; Dennis Hoyniak; et al. (IBM J. Res. Dev., 2003)

DRC-free high density layout exploration with layout morphing and patterning quality assessment, with application to SRAM. - Amith Singhee; Emrah Acar; Mohammad Imran Younus; Rama N. Singh; Aditya Bansal (ISQED, 2012)

A 64Mb SRAM in 22nm SOI technology featuring fine-granularity power gating and low-energy power-supply-partition techniques for 37% leakage reduction. - Harold Pilo; Chad A. Adams; Igor Arsovski; Robert M. Houle; Steve Lamphier; Michael M. Lee; Frank Pavlik; Sushma N. Sambatur; Adnan Seferagic; Richard Wu; Mohammad Imran Younus (ISSCC, 2013)