An Energy-Efficient Full Adder Cell Using CNFET Technology. - Mohammad Reza Reshadinezhad; Mohammad Hossein Moaiyeri; Keivan Navi (IEICE Trans. Electron., 2012)

Efficient CNTFET-based design of quaternary logic gates and arithmetic circuits. - Seyyed Ashkan Ebrahimi; Mohammad Reza Reshadinezhad; Ali Bohlooli; Mahyar Shahsavari (Microelectron. J., 2016)

Design of a parity preserving reversible full adder/subtractor circuit. - Shiva Rahbar Arabani; Mohammad Reza Reshadinezhad; Majid Haghparast (Int. J. Comput. Intell. Stud., 2018)

A new design method for imperfection-immune CNFET-based circuit design. - Seyyed Ashkan Ebrahimi; Mohammad Reza Reshadinezhad; Ali Bohlooli (Microelectron. J., 2019)

A Memristor-based Quaternary Memory with Adaptive Noise Tolerance. - Arezoo Dabaghi Zarandi; Antonio Rubio 001; Mohammad Reza Reshadinezhad (DCIS, 2020)

A Systematic Method to Design Efficient Ternary High Performance CNTFET-Based Logic Cells. - Arezoo Dabaghi Zarandi; Mohammad Reza Reshadinezhad; Antonio Rubio 001 (IEEE Access, 2020)

LAHAF: Low-power, area-efficient, and high-performance approximate full adder based on static CMOS. - Seyed Erfan Fatemieh; Samira Shirinabadi Farahani; Mohammad Reza Reshadinezhad (Sustain. Comput. Informatics Syst., 2021)

Approximate In-Memory Computing using Memristive IMPLY Logic and its Application to Image Processing. - Seyed Erfan Fatemieh; Mohammad Reza Reshadinezhad; Nima TaheriNejad (ISCAS, 2022)

Fast and Compact Serial IMPLY-Based Approximate Full Adders Applied in Image Processing. - Seyed Erfan Fatemieh; Mohammad Reza Reshadinezhad; Nima TaheriNejad (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

Energy-Efficient Approximate Full Adders Applying Memristive Serial IMPLY Logic For Image Processing. - Seyed Erfan Fatemieh; Mohammad Reza Reshadinezhad (CoRR, 2024)

Energy-Efficient and Fast Memristor-based Serial Multipliers Applicable in Image Processing. - Seyed Erfan Fatemieh; Bahareh Bagheralmoosavi; Mohammad Reza Reshadinezhad (CoRR, 2024)

Toward Designing High-Speed Cost-Efficient Quantum Reversible Carry Select Adders. - Shekoofeh Moghimi; Mohammad Reza Reshadinezhad; Antonio Rubio 001 (IEEE Trans. Emerg. Top. Comput., 2024)

Energy-efficient and fast IMPLY-based approximate full adder applying NAND gates for image processing. - Samane Asgari; Mohammad Reza Reshadinezhad; Seyed Erfan Fatemieh (Comput. Electr. Eng., 2024)

New design for error-resilient approximate multipliers used in image processing in CNTFET technology. - Samira Shirinabadi Farahani; Mohammad Reza Reshadinezhad; Seyed Erfan Fatemieh (J. Supercomput., 2024)

Cascadable-Controllable Self-Assembly DNA Tiles for Large-Scale DNA Logic Circuits. - Fatemeh Kazemi HassanAbadi; Mohammad Reza Reshadinezhad; Zohre Beiki; Fariba Dehghanian (IEEE Trans. Biomed. Circuits Syst., 2024)

T-count and T-depth efficient fault-tolerant quantum arithmetic and logic unit. - Sarallah Keshavarz; Mohammad Reza Reshadinezhad; Shekoofeh Moghimi (Quantum Inf. Process., 2024)

Design of energy-efficient and high-speed hybrid decimal adder. - Negin Mashayekhi; Ghassem Jaberipur; Mohammad Reza Reshadinezhad; Shekoofeh Moghimi (J. Supercomput., 2025)

Fast and low energy approximate full adder based on FELIX logic. - Seyed Erfan Fatemieh; Samane Asgari; Mohammad Reza Reshadinezhad (CoRR, 2025)

Power-area efficient serial IMPLY-based 4:2 compressor applied in data-intensive applications. - Bahareh Bagheralmoosavi; Seyed Erfan Fatemieh; Mohammad Reza Reshadinezhad; Antonio Rubio 001 (Clust. Comput., 2025)