A frequency digitizer based on the continuous time phase domain noise shaping. - Mohammad Sharifkhani (ISCAS (1), 2004)

A Phase-Domain Continuous-Time 2nd-Order ΔΣ Frequency Digitizer. - Mohammad Sharifkhani; Manoj Sachdev (CICC, 2006)

A phase-domain 2nd-order continuous time Delta-Sigma-modulator for frequency digitization. - Mohammad Sharifkhani; Manoj Sachdev (ISCAS, 2006)

A low power SRAM architecture based on segmented virtual grounding. - Mohammad Sharifkhani; Manoj Sachdev (ISLPED, 2006)

Dynamic Data Stability in SRAM Cells and Its Implications on Data Stability Tests. - Mohammad Sharifkhani; Shah M. Jahinuzzaman; Manoj Sachdev (MTDT, 2006)

Dynamic Data Stability in Low-power SRAM Design. - Mohammad Sharifkhani; Shah M. Jahinuzzaman; Manoj Sachdev (CICC, 2007)

Segmented Virtual Ground Architecture for Low-Power Embedded SRAM. - Mohammad Sharifkhani; Manoj Sachdev (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Investigation of Process Impact on Soft Error Susceptibility of Nanometric SRAMs Using a Compact Critical Charge Model. - Shah M. Jahinuzzaman; Mohammad Sharifkhani; Manoj Sachdev (ISQED, 2008)

SRAM Cell Stability: A Dynamic Perspective. - Mohammad Sharifkhani; Manoj Sachdev (IEEE J. Solid State Circuits, 2009)

An Energy Efficient 40 Kb SRAM Module With Extended Read/Write Noise Margin in 0.13 µm CMOS. - Mohammad Sharifkhani; Manoj Sachdev (IEEE J. Solid State Circuits, 2009)

An Analytical Model for Soft Error Critical Charge of Nanometric SRAMs. - Shah M. Jahinuzzaman; Mohammad Sharifkhani; Manoj Sachdev (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Modeling of DLL-based frequency multiplier in time and frequency domain with Matlab Simulink. - Mohammad Gholami; Mohammad Sharifkhani; Saeed Saeedi (APCCAS, 2010)

A scalable offset-cancelled current/voltage sense amplifier. - Hourieh Attarzadeh; Mohammad Sharifkhani; Shah M. Jahinuzzaman (ISCAS, 2010)

A low power 1-V 10-bit 40-MS/s pipeline ADC. - Mohsen Hashemi; Mohammad Sharifkhani; Mohammad Gholami (ICECS, 2011)

CMOS-compatible structure for voltage-mode multiple-valued logic circuits. - Mohammad S. Eslampanah Sendi; Mohammad Sharifkhani; Amir M. Sodagar (ICECS, 2011)

An audio band low voltage CT-ΔΣ modulator with VCO-based quantizer. - Bahman Yousefzadeh; Mohammad Sharifkhani (ICECS, 2011)

Implementation of a cost efficient SSL based on an Angular beamformer SRP-PHAT. - Hamid R. Zarghi; Mohammad Sharifkhani; Iman Gholampour (ICECS, 2011)

A subthreshold dynamic read SRAM (DRSRAM) based on dynamic stability criteria. - Roghayeh Saeidi; Mohammad Sharifkhani; Khosrow Hajsadeghi (ISCAS, 2011)

A sub 1 V high PSRR CMOS bandgap voltage reference. - Mohammad Chahardori; Seyed Mojtaba Atarodi; Mohammad Sharifkhani (Microelectron. J., 2011)

A Compact Hybrid Current/Voltage Sense Amplifier With Offset Cancellation for High-Speed SRAMs. - Mohammad Sharifkhani; Ehsan Rahiminejad; Shah M. Jahinuzzaman; Manoj Sachdev (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A 10MHz CTDSM with differential VCO-based quantizer in 90nm. - Bahman Yousefzadeh; Ali Hajian; Mohammad Sharifkhani (DTIS, 2013)

A low power 1.2 GS/s 4-bit flash ADC in 0.18 µm CMOS. - Mohammad Chahardori; Mohammad Sharifkhani; Sirus Sadughi (EWDTS, 2013)

Step response analysis of third order OpAmps With slew-rate. - Mohsen Hassanpourghadi; Mohammad Sharifkhani (VLSI-SoC, 2013)

A 4-Bit, 1.6 GS/s Low Power Flash ADC, Based on Offset Calibration and Segmentation. - Mohammad Chahardori; Mohammad Sharifkhani; Sirus Sadughi (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

Fast Static Characterization of Residual-Based ADCs. - Mohsen Hassanpourghadi; Mohammad Sharifkhani (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

A 3-D inductive powering approach dedicated to implantable/wearable biomedical microsystems. - Mohammad S. Eslampanah Sendi; Soraya Nasiri; Narges Mousavi; Mohammad Sharifkhani; Amir M. Sodagar (BioCAS, 2014)

A low-power 10-Bit 40-MS/s pipeline ADC using extended capacitor sharing. - Hani Esmaeelzadeh; Mohammad Sharifkhani; Mahdi Shabany (ISCAS, 2014)

An efficient high-throughput LSI architecture for a synchronization block applied to real-time optical OFDM systems. - Reza Ghanaatian; Mahdi Shabany; Mohammad Sharifkhani (ISCAS, 2014)

An auto-calibrated, dual-mode SRAM macro using a hybrid offset-cancelled sense amplifier. - Hourieh Attarzadeh; Mohammad Sharifkhani (Microelectron. J., 2014)

A low-power low-offset dynamic comparator for analog to digital converters. - Mohsen Hassanpourghadi; Milad Zamani; Mohammad Sharifkhani (Microelectron. J., 2014)

A Subthreshold Symmetric SRAM Cell With High Read Stability. - Roghayeh Saeidi; Mohammad Sharifkhani; Khosrow Hajsadeghi (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

Statistical Analysis of Read Static Noise Margin for Near/Sub-Threshold SRAM Cell. - Roghayeh Saeidi; Mohammad Sharifkhani; Khosrow Hajsadeghi (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Wireless interfacing to cortical neural recording implants using 4-FSK modulation scheme. - Mohammad S. Eslampanah Sendi; Mohsen Judy; Hasan Molaei; Amir M. Sodagar; Mohammad Sharifkhani (ICECS, 2015)

Zero-power mismatch-independent Digital to Analog converter. - Ata Khorami; Mohammad S. Eslampanah Sendi; Ali Nikoofard; Mohammad Sharifkhani (NEWCAS, 2015)

Bandwidth enhancement of planar EBG structure using dissipative edge termination. - Ali Sadr; Nasser Masoumi; Mohammad Sharifkhani (NEWCAS, 2015)

Elimination of the effect of bottom-plate capacitors in C-2C DAC using a layout technique. - Ata Khorami; Mohammad Sharifkhani (Microelectron. J., 2015)

A Unified Solution for Super-Regenerative Systems With Application to Correlator-Based UWB Transceivers. - Seyed Mohammadreza Fatemi; Mohammad Sharifkhani; Ali Fotowat-Ahmady (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A high-speed method of dynamic comparators for SAR analog to digital converters. - Ata Khorami; Mohammad Sharifkhani (MWSCAS, 2016)

An accurate low-power DAC for SAR ADCs. - Seyed Behnam Yazdani; Ata Khorami; Mohammad Sharifkhani (MWSCAS, 2016)

Ultra-low power current mode all- MOS ASK demodulator for radio frequency identification applications. - Narges Mousavi; Mohammad Sharifkhani; Mohsen Jalali (IET Circuits Devices Syst., 2016)

A Low-Latency QRD-RLS Architecture for High-Throughput Adaptive Applications. - Mohammad Sadegh Alizadeh; Javad Bagherzadeh; Mohammad Sharifkhani (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

General Characterization Method and a Fast Load-Charge-Preserving Switching Procedure for the Stepwise Adiabatic Circuits. - Ata Khorami; Mohammad Sharifkhani (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

An ultra low-power digital to analog converter for SAR ADCs. - Ata Khorami; Mohammad Sharifkhani (ICM, 2017)

A low-power temperature-compensated CMOS peaking current reference in subthreshold region. - Mohammad S. Eslampanah Sendi; Siavash Kananian; Elaheh Zendehrouh; Mohammad Sharifkhani; Amir M. Sodagar; Mahdi Shabany (ISCAS, 2017)

Excess power elimination in high-resolution dynamic comparators. - Ata Khorami; Mohammad Sharifkhani (Microelectron. J., 2017)

Analysis and Design of Power Harvesting Circuits for Ultra-Low Power Applications. - Ali Asghar Razavi Haeri; Mohammadreza Ghaderi Karkani; Mohammad Sharifkhani; Mahmoud Kamarei; Ali Fotowat-Ahmady (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

An Efficient Fast Switching Procedure for Stepwise Capacitor Chargers. - Ata Khorami; Mohammad Sharifkhani (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A Time-Interleaved 2b/Cycle SAR ADC with Background Offset Calibration. - Shahaboddin Ghajari; Mohammad Sharifkhani (ISCAS, 2018)

JVET Encoder Complexity Analysis. - Amir Ahmad Mohammadi; Mohammad Sadegh Alizadeh; Mohammad Sharifkhani (ISCAS, 2018)

A low-power technique for high-resolution dynamic comparators. - Ata Khorami; Mohammad Sharifkhani (Int. J. Circuit Theory Appl., 2018)

Temperature Compensation in CMOS Peaking Current References. - Mohammad S. Eslampanah Sendi; Siavash Kananian; Mohammad Sharifkhani; Amir M. Sodagar (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A Low-Power High-Speed Comparator for Precise Applications. - Ata Khorami; Mohammad Sharifkhani (IEEE Trans. Very Large Scale Integr. Syst., 2018)

An Ultra Low-power Low-offset Double-tail Comparator. - Ata Khorami; Roghayeh Saeidi; Mohammad Sharifkhani; Nima Taherinejad (NEWCAS, 2019)

A Contention-free, Static, Single-phase Flip-Flop for Low Data Activity Applications. - Ata Khorami; Manoj Sachdev; Mohammad Sharifkhani (SoCC, 2019)

A low-power dynamic comparator for low-offset applications. - Ata Khorami; Roghayeh Saeidi; Manoj Sachdev; Mohammad Sharifkhani (Integr., 2019)

Yield constrained automated design algorithm for power optimized pipeline ADC. - Vala Sadrafshari; Shamin Sadrafshari; Mohammad Sharifkhani (Integr., 2020)

Compressed Domain Moving Object Detection Based on CRF. - Mohammad Sadegh Alizadeh; Mohammad Sharifkhani (IEEE Trans. Circuits Syst. Video Technol., 2020)

TiltedBERT: Resource Adjustable Version of BERT. - Sajjad Kachuee; Mohammad Sharifkhani (CoRR, 2022)

Rapid Emulation of Approximate DNN Accelerators. - Amirreza Farahbakhsh; Seyedmehdi Hosseini; Sajjad Kachuee; Mohammad Sharifkhani (ISCAS, 2024)

Reduced Domain Multiplication for Deep Neural Network Acceleration. - Seyedmehdi Hosseini; Mohammad Kolahdouzan; Mohammad Sharifkhani (ISCAS, 2025)

Latency Adjustable Transformer Encoder for Language Understanding. - Sajjad Kachuee; Mohammad Sharifkhani (IEEE Trans. Neural Networks Learn. Syst., 2025)