Using randomization to cope with circuit uncertainty. - Hamid Safizadeh; Mohammad Tahghighi; Ehsan K. Ardestani; Gholamhossein Tavasoli; Kia Bazargan (DATE, 2009)

Analytical Delay Model for CPU-FPGA Data Paths in Programmable System-on-Chip FPGA. - Mohammad Tahghighi; Sharad Sinha; Wei Zhang 012 (ARC, 2016)

Area Efficient Hardware Architecture for Implicitly-Defined Complex Events Processing. - Mohammad Tahghighi; Wei Zhang 012; Sharad Sinha (ISVLSI, 2016)

A Generic Methodology to Compute Design Sensitivity to SEU in SRAM-Based FPGA. - Mahsa Mousavi; Hamid Reza Pourshaghaghi; Mohammad Tahghighi; Roel Jordans; Henk Corporaal (DSD, 2018)

Accelerate pattern recognition for cyber security analysis. - Mohammad Tahghighi; Wei Zhang 012 (ASP-DAC, 2019)

SENeCA: Scalable Energy-efficient Neuromorphic Computer Architecture. - Amirreza Yousefzadeh; Gert-Jan van Schaik; Mohammad Tahghighi; Paul Detterer; Stefano Traferro; Martijn Hijdra; Jan Stuijt; Federico Corradi; Manolis Sifalakis; Mario Konijnenburg (AICAS, 2022)

SENSIM: An Event-driven Parallel Simulator for Multi-core Neuromorphic Systems. - Prithvish Nembhani; Kanishkan Vadivel; Guangzhi Tang; Mohammad Tahghighi; Gert-Jan van Schaik; Manolis Sifalakis; Zaid Al-Ars; Amirreza Yousefzadeh (IJCNN, 2024)