The Arithmetic Cube: error analysis and simulation. - Mohan Vishwanath; Robert Michael Owens; Mary Jane Irwin (ASAP, 1991)

The arithmetic cube II: a second generation VLSI DSP processor. - Mary Jane Irwin; Robert Michael Owens; Thomas P. Kelliher; Kin-Ki Leung; Mohan Vishwanath (ICASSP, 1991)

Implementing a family of high performance, micrograined architectures. - Robert Michael Owens; Mary Jane Irwin; Thomas P. Kelliher; Mohan Vishwanath; Raminder Singh Bajwa (ASAP, 1992)

Discrete wavelet transforms in VLSI. - Mohan Vishwanath; Robert Michael Owens; Mary Jane Irwin (ASAP, 1992)

An AT2 lower bound for wavelet transforms in VLSI. - Mohan Vishwanath; Robert Michael Owens (ICASSP, 1992)

ECube: An Efficient Architecture for Analyzing Time-Varying Spectra. - Mohan Vishwanath; Robert Michael Owens; Mary Jane Irwin (VLSI Design, 1992)

Edge detection using fine-grained parallelism in VLSI. - Chetana Nagendra; Manjit Borah; Mohan Vishwanath; Robert Michael Owens; Mary Jane Irwin (ICASSP (1), 1993)

A new blocked IIR algorithm. - Chen-Mi Wu; Mohan Vishwanath; Robert Michael Owens; Mary Jane Irwin (ICASSP (3), 1993)

The design and implementation of the Arithmetic Cube II, a VLSI signal processing system. - Robert Michael Owens; Thomas P. Kelliher; Mary Jane Irwin; Mohan Vishwanath; Raminder Singh Bajwa; Wen-Lin Yang (IEEE Trans. Very Large Scale Integr. Syst., 1993)

Algorithms and architectures for hierarchical compression of video. - Mohan Vishwanath (ASAP, 1994)

A VLSI architecture for real-time hierarchical encoding/decoding of video using the wavelet transform. - Mohan Vishwanath; Chaitali Chakrabarti (ICASSP (2), 1994)

An Efficient Algorithm for Hierarchical Compression of Video. - Mohan Vishwanath; Philip A. Chou (ICIP (3), 1994)

The recursive pyramid algorithm for the discrete wavelet transform. - Mohan Vishwanath (IEEE Trans. Signal Process., 1994)

Hierarchical Vector Quantization of Perceptually Weighted Block Transforms. - Navin Chaddha; Mohan Vishwanath; Philip A. Chou (Data Compression Conference, 1995)

A survey of architectures for the discrete and continuous wavelet transforms. - Chaitali Chakrabarti; Mohan Vishwanath; Robert Michael Owens (ICASSP, 1995)

Efficient realizations of the discrete and continuous wavelet transforms: from single chip implementations to mappings on SIMD array computers. - Chaitali Chakrabarti; Mohan Vishwanath (IEEE Trans. Signal Process., 1995)

A Common Architecture For The DWT and IDWT. - Mohan Vishwanath; Robert Michael Owens (ASAP, 1996)

Improving the performance of hierarchical vector quantization using segmentation. - Rajan L. Joshi; Mohan Vishwanath (ICIP (3), 1996)

A low power video encoder with power, memory and bandwidth scalability. - Navin Chaddha; Mohan Vishwanath (VLSI Design, 1996)

An optimal time multiplication free algorithm for edge detection on a mesh. - Manjit Borah; Chetana Nagendra; Mohan Vishwanath; Robert Michael Owens; Mary Jane Irwin (J. VLSI Signal Process., 1996)

Architectures for wavelet transforms: A survey. - Chaitali Chakrabarti; Mohan Vishwanath; Robert Michael Owens (J. VLSI Signal Process., 1996)

A progressive Ziv-Lempel algorithm for image compression. - Daniel Greene; Mohan Vishwanath; F. Frances Yao; Tong Zhang 001 (SEQUENCES, 1997)

A Very Efficient Storage Structure for DWT and IDWT Filters. - Robert Michael Owens; Mohan Vishwanath (J. VLSI Signal Process., 1998)