Compiling and Optimizing Image Processing Algorithms for FPGAs. - Bruce A. Draper; Walid A. Najjar; A. P. Wim Böhm; Jeffrey Hammes; Robert Rinker; Charlie Ross; Monica Chawathe; José Bins (CAMP, 2000)

One-Step Compilation of Image Processing Applications to FPGAs. - A. P. Wim Böhm; Bruce A. Draper; Walid A. Najjar; Jeffrey Hammes; Robert Rinker; Monica Chawathe; Charlie Ross (FCCM, 2001)

Compiling SA-C Programs to FPGAs: Performance Results. - Bruce A. Draper; A. P. Wim Böhm; Jeffrey Hammes; Walid A. Najjar; J. Ross Beveridge; Charlie Ross; Monica Chawathe; Mitesh Desai; José Bins (ICVS, 2001)

Loop fusion and temporal common subexpression elimination in window-based loops. - Jeffrey Hammes; A. P. Wim Böhm; Charlie Ross; Monica Chawathe; Bruce A. Draper; Robert Rinker; Walid A. Najjar (IPDPS, 2001)

An automated process for compiling dataflow graphs into reconfigurable hardware. - Robert Rinker; M. Carter; A. Patel; Monica Chawathe; Charlie Ross; Jeffrey Hammes; Walid A. Najjar; A. P. Wim Böhm (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Compiling ATR Probing Codes for Execution on FPGA Hardware. - A. P. Wim Böhm; J. Ross Beveridge; Bruce A. Draper; Charlie Ross; Monica Chawathe; Walid A. Najjar (FCCM, 2002)

Implementing Image Applications on FPGAs. - Bruce A. Draper; J. Ross Beveridge; A. P. Wim Böhm; Charles Ross; Monica Chawathe (ICPR (3), 2002)

Mapping a Single Assignment Programming Language to Reconfigurable Systems. - A. P. Wim Böhm; Jeffrey Hammes; Bruce A. Draper; Monica Chawathe; Charlie Ross; Robert Rinker; Walid A. Najjar (J. Supercomput., 2002)

High-Level Language Abstraction for Reconfigurable Computing. - Walid A. Najjar; A. P. Wim Böhm; Bruce A. Draper; Jeffrey Hammes; Robert Rinker; J. Ross Beveridge; Monica Chawathe; Charles Ross (Computer, 2003)

Accelerated image processing on FPGAs. - Bruce A. Draper; J. Ross Beveridge; A. P. Wim Böhm; Charles Ross; Monica Chawathe (IEEE Trans. Image Process., 2003)