Improvement of Compiled Instruction Set Simulator by Increasing Flexibility a. - Moo-Kyoung Chung; Chong-Min Kyung (IEEE International Workshop on Rapid System Prototyping, 2004)

A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation. - Jae-Gon Lee; Moo-Kyoung Chung; Ki-Yong Ahn; Sang-Heon Lee 006; Chong-Min Kyung (DATE, 2005)

Performance Improvement of Multiprocessor Simulation by Optimizing Synchronization a Communication. - Moo-Kyoung Chung; Heejun Shim; Chong-Min Kyung (IEEE International Workshop on Rapid System Prototyping, 2005)

Improving Lookahead in Parallel Multiprocessor Simulation Using Dynamic Execution Path Prediction. - Moo-Kyoung Chung; Chong-Min Kyung (PADS, 2006)

Enhancing Performance of HW/SW Cosimulation and Coemulation by Reducing Communication Overhead. - Moo-Kyoung Chung; Chong-Min Kyung (IEEE Trans. Computers, 2006)

Cache Miss-Aware Dynamic Stack Allocation. - Sung-Joon Jang; Moo-Kyoung Chung; Jaemoon Kim; Chong-Min Kyung (ISCAS, 2007)

Lossless frame memory recompression for video codec preserving random accessibility of coding unit. - Sang-Heon Lee 006; Moo-Kyoung Chung; Sung-Mo Park; Chong-Min Kyung (IEEE Trans. Consumer Electron., 2009)

Low latency variable length coding scheme for frame memory recompression. - Sang-Heon Lee 006; Nak-Woong Eum; Moo-Kyoung Chung; Chong-Min Kyung (ICME, 2010)

Implementation of a volume rendering on coarse-grained reconfigurable multiprocessor. - Seunghun Jin; Sang-Heon Lee 006; Moo-Kyoung Chung; Yeon-Gon Cho; Soojung Ryu (FPT, 2012)

Efficient code compression for coarse grained reconfigurable architectures. - Moo-Kyoung Chung; Yeon-Gon Cho; Soojung Ryu (ICCD, 2012)

Design and evaluation of a four-port data cache for high instruction level parallelism reconfigurable processors. - Kiyeon Lee; Moo-Kyoung Chung; Soojung Ryu; Yeon-Gon Cho; Sangyeun Cho (ICCD, 2012)

Adaptive compression for instruction code of Coarse Grained Reconfigurable Architectures. - Moo-Kyoung Chung; Jun-Kyoung Kim; Yeon-Gon Cho; Soojung Ryu (FPT, 2013)

Mapping and Scheduling of Tasks and Communications on Many-Core SoC Under Local Memory Constraint. - Jinho Lee; Moo-Kyoung Chung; Yeon-Gon Cho; Soojung Ryu; Jung Ho Ahn; Kiyoung Choi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

SimParallel: A high performance parallel SystemC simulator using hierarchical multi-threading. - Moo-Kyoung Chung; Jun-Kyoung Kim; Soojung Ryu (ISCAS, 2014)

ULP-SRP: Ultra Low-Power Samsung Reconfigurable Processor for Biomedical Applications. - Changmoo Kim; Moo-Kyoung Chung; Yeon-Gon Cho; Mario Konijnenburg; Soojung Ryu; Jeongwook Kim (ACM Trans. Reconfigurable Technol. Syst., 2014)