All-digital phased-locked loop with local passive interpolation time-to-digital converter based on a tristate inverter. - Moon Seok Kim; Yong-Bin Kim; Kyung Ki Kim (MWSCAS, 2012)

Design and analysis of the quadfferential amplifier. - Tina Marie Rookmaaker; Moon Seok Kim; Yong-Bin Kim (Microelectron. J., 2012)

Steep Slope Devices: Enabling New Architectural Paradigms. - Karthik Swaminathan; Huichu Liu; Xueqing Li 002; Moon Seok Kim; Jack Sampson; Vijaykrishnan Narayanan (DAC, 2014)

Modeling steep slope devices: From circuits to architectures. - Karthik Swaminathan; Moon Seok Kim; Nandhini Chandramoorthy; Behnam Sedighi; Robert Perricone; Jack Sampson; Vijaykrishnan Narayanan (DATE, 2014)

Design and Implementation of Digital Hologram Content Using Modified Depth Information. - Scott Park; Hyun-Jun Choi; Moon Seok Kim; Dong-Wook Kim; Young-Ho Seo (J. Inform. and Commun. Convergence Engineering, 2014)

Single-Ended and Differential MRAMs Based on Spin Hall Effect: A Layout-Aware Design Perspective. - Ahmedullah Aziz; William Cane-Wissing; Moon Seok Kim; Suman Datta; Vijaykrishnan Narayanan; Sumeet Kumar Gupta (ISVLSI, 2015)

Comparing Energy, Area, Delay Tradeoffs in Going Vertical with CMOS and Asymmetric HTFETs. - Moon Seok Kim; William Cane-Wissing; Jack Sampson; Suman Datta; Vijaykrishnan Narayanan; Sumeet Kumar Gupta (ISVLSI, 2015)

Device Circuit Co Design of FEFET Based Logic for Low Voltage Processors. - Sumitha George; Ahmedullah Aziz; Xueqing Li 002; Moon Seok Kim; Suman Datta; John Sampson; Sumeet Kumar Gupta; Vijaykrishnan Narayanan (ISVLSI, 2016)

Comparative Area and Parasitics Analysis in FinFET and Heterojunction Vertical TFET Standard Cells. - Moon Seok Kim; William Cane-Wissing; Xueqing Li 002; Jack Sampson; Suman Datta; Sumeet Kumar Gupta; Vijaykrishnan Narayanan (ACM J. Emerg. Technol. Comput. Syst., 2016)

Exploration of Low-Power High-SFDR Current-Steering D/A Converter Design Using Steep-Slope Heterojunction Tunnel FETs. - Moon Seok Kim; Xueqing Li 002; Huichu Liu; John Sampson; Suman Datta; Vijaykrishnan Narayanan (IEEE Trans. Very Large Scale Integr. Syst., 2016)