The Optimum Physical Targets of the 3-Dimensional Vertical FG NAND Flash Memory Cell Arrays with the Extended Sidewall Control Gate (ESCG) Structure. - Moon-Sik Seo; Tetsuo Endoh (IEICE Trans. Electron., 2011)

FG Width Scalability of the 3-D Vertical FG NAND Using the Sidewall Control Gate (SCG). - Moon-Sik Seo; Tetsuo Endoh (IEICE Trans. Electron., 2012)

Modeling of Charge Failure Mechanisms during the Short Term Retention Depending on Program/Erase Cycle Counts in 3-D NAND Flash Memories. - Changbeom Woo; Shinkeun Kim; Jaeyeol Park; Hyungcheol Shin; Haesoo Kim; Gil-Bok Choi; Moon-Sik Seo; Keum Hwan Noh (IRPS, 2020)