Netlist-level IP protection by watermarking for LUT-based FPGAs. - Moritz Schmid; Daniel Ziener; Jürgen Teich (FPT, 2008)

Modeling and synthesis of communication subsystems for loop accelerator pipelines. - Hritam Dutta; Frank Hannig; Moritz Schmid; Joachim Keinert (ASAP, 2010)

A deeply pipelined and parallel architecture for denoising medical images. - Frank Hannig; Moritz Schmid; Jürgen Teich; Heinz Hornegger (FPT, 2010)

RITK: The Range Imaging Toolkit - A Framework for 3-D Range Image Stream Processing. - Jakob Wasza; Sebastian Bauer 001; Sven Haase; Moritz Schmid; Sebastian Reichert; Joachim Hornegger (VMV, 2011)

Power Management Strategies for Serial RapidIO Endpoints in FPGAs. - Moritz Schmid; Frank Hannig; Jürgen Teich (FCCM, 2012)

Hierarchical power management for adaptive tightly-coupled processor arrays. - Vahid Lari; Shravan Muddasani; Srinivas Boppu; Frank Hannig; Moritz Schmid; Jürgen Teich (ACM Trans. Design Autom. Electr. Syst., 2012)

System integration of tightly-coupled processor arrays using reconfigurable buffer structures. - Frank Hannig; Moritz Schmid; Vahid Lari; Srinivas Boppu; Jürgen Teich (Conf. Computing Frontiers, 2013)

High-Level Synthesis Revised - Generation of FPGA Accelerators from a Domain-Specific Language using the Polyhedron Model. - Moritz Schmid; Frank Hannig; Alexandru Tanase; Jürgen Teich (PARCO, 2013)

Real-timerange image preprocessing on FPGAs. - Moritz Schmid; Markus Blocherer; Frank Hannig; Jürgen Teich (ReConFig, 2013)

Domain-specific augmentations for High-Level Synthesis. - Moritz Schmid; Alexandru Tanase; Frank Hannig; Jürgen Teich; Vivek Singh Bhadouria; Dibyendu Ghoshal (ASAP, 2014)

Code generation from a domain-specific language for C-based HLS of hardware accelerators. - Oliver Reiche; Moritz Schmid; Frank Hannig; Richard Membarth; Jürgen Teich (CODES+ISSS, 2014)

An image processing library for C-based high-level synthesis. - Moritz Schmid; Nicolas Apelt; Frank Hannig; Jürgen Teich (FPL, 2014)

Code Generation for High-Level Synthesis of Multiresolution Applications on FPGAs. - Moritz Schmid; Oliver Reiche; Christian Schmitt 003; Frank Hannig; Jürgen Teich (CoRR, 2014)

Loop coarsening in C-based High-Level Synthesis. - Moritz Schmid; Oliver Reiche; Frank Hannig; Jürgen Teich (ASAP, 2015)

Synthesis and optimization of image processing accelerators using domain knowledge. - Oliver Reiche; Konrad Häublein; Marc Reichenbach; Moritz Schmid; Frank Hannig; Jürgen Teich; Dietmar Fey (J. Syst. Archit., 2015)

Rapid Prototyping for Hardware Accelerators in the Medical Imaging Domain. - Moritz Schmid (2015)

HIPAcc. - Moritz Schmid; Oliver Reiche; Frank Hannig; Jürgen Teich (FPGAs for Software Programmers, 2016)

Big Data and HPC Acceleration with Vivado HLS. - Moritz Schmid; Christian Schmitt 003; Frank Hannig; Gorker Alp Malazgirt; Nehir Sönmez; Arda Yurdakul; Adrián Cristal (FPGAs for Software Programmers, 2016)

A Novel Image Impulse Noise Removal Algorithm Optimized for Hardware Accelerators. - Vivek Singh Bhadouria; Alexandru Tanase; Moritz Schmid; Frank Hannig; Jürgen Teich; Dibyendu Ghoshal (J. Signal Process. Syst., 2017)

Reconfigurable Hardware Generation of Multigrid Solvers with Conjugate Gradient Coarse-Grid Solution. - Christian Schmitt 003; Moritz Schmid; Sebastian Kuckuk; Harald Köstler; Jürgen Teich; Frank Hannig (Parallel Process. Lett., 2018)

Loop Parallelization Techniques for FPGA Accelerator Synthesis. - Oliver Reiche; M. Akif Ozkan; Frank Hannig; Jürgen Teich; Moritz Schmid (J. Signal Process. Syst., 2018)

SAM-DA: Decoder Adapter for Efficient Medical Domain Adaptation. - Javier Gamazo Tejero; Moritz Schmid; Pablo Márquez-Neila; Martin S. Zinkernagel; Sebastian Wolf 005; Raphael Sznitman (WACV, 2025)