A high speed 2-D discrete cosine transform chip. - B. Sikström; Lars Wanhammar; Morteza Afghahi; J. Pencz (Integr., 1987)

A unified single-phase clocking scheme for VLSI systems. - Morteza Afghahi; Christer Svensson (IEEE J. Solid State Circuits, 1990)

Double-edge-triggered D-flip-flops for high-speed CMOS circuits. - Morteza Afghahi; Jiren Yuan (IEEE J. Solid State Circuits, 1991)

A 512 16-b bit-serial sorter chip. - Morteza Afghahi (IEEE J. Solid State Circuits, 1991)

Performance of Synchronous and Asynchronous Schemes for VLSI Systems. - Morteza Afghahi; Christer Svensson (IEEE Trans. Computers, 1992)