High-speed low-power Single-Stage latched-comparator with improved gain and kickback noise rejection. - Sarang Kazeminia; Morteza Mousazadeh; Khayrollah Hadidi; Abdollah Khoei (APCCAS, 2010)

A highly linear open-loop high-speed CMOS sample-and-hold. - Morteza Mousazadeh; Khayrollah Hadidi; Abdollah Khoei (APCCAS, 2010)

A 500 MS/s 600 µW 300 µm2 Single-Stage Gain-Improved and Kickback Noise Rejected Comparator in 0.35 µm 3.3 v CMOS Process. - Sarang Kazeminia; Morteza Mousazadeh; Khayrollah Hadidi; Abdollah Khoei (IEICE Trans. Electron., 2011)

A high speed and fully tunable MFG with new programmable CMOS OTA and new MIN circuit. - Alireza Abolhasani; Mohammad Tohidi; Morteza Mousazadeh; Abdollah Khoei; Khayrollah Hadidi (MIXDES, 2013)

The sundial based sun-tracking system with AVR microcontroller. - Mostafa Amirpour; Morteza Mousazadeh; Mohammad Tohidi; Khayrollah Hadidi (MIXDES, 2013)

A circuit implementation of an ultra high speed, low power analog fully programmable MFG. - Mohammad Tohidi; Alireza Abolhasani; Morteza Mousazadeh; Abdollah Khoei; Khayrollah Hadidi (MIXDES, 2013)

CMOS implementation of a new high speed, glitch-free 5-2 compressor for fast arithmetic operations. - Mohammad Tohidi; Morteza Mousazadeh; Saeed Akbari; Khayrollah Hadidi; Abdollah Khoei (MIXDES, 2013)

An 8B/10B encoder with 2GHz operating frequency. - Hamed Ashrafi; Morteza Mousazadeh; Khayrollah Hadidi (MWSCAS, 2016)

High-Speed 32*32 bit Multiplier in 0.18um CMOS Process. - Ebrahim Hosseini; Morteza Mousazadeh; Abdollah Amini (MIXDES, 2018)

A New High-speed and Low area Efficient Pipelined 128-bit Adder Based on Modified Carry Look-ahead Merging with Han-Carlson Tree Method. - Sara Ghafari; Morteza Mousazadeh; Abdollah Khoei; Ali Dadashi (MIXDES, 2019)

A New Very High-speed True 7-3 Compressor. - Sara Ghafari; Morteza Mousazadeh; Abdollah Khoei; Ali Dadashi (MIXDES, 2019)

A Wide Band Fractional-N Synthesizer in 0.18um CMOS Process. - Ebrahim Hosseini; Morteza Mousazadeh; Ali Dadashi (MIXDES, 2019)

A Fast-Lock, Low Jitter, High-Speed Half-Rate CDR Architecture with a Composite Phase Detector (CPD). - Zaher Kakehbra; Morteza Mousazadeh; Abdollah Khoei; Ali Dadashi (MIXDES, 2019)

High-speed, low power, and dead zone improved phase frequency detector. - Amir Fathi; Morteza Mousazadeh; Abdollah Khoei (IET Circuits Devices Syst., 2019)

Generalized Method of Analog Circuit Characteristic Function Analysis. - Amir Fathi; Abdollah Khoei; Morteza Mousazadeh (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Fast-locking PLL based on a novel PFD-CP structure and reconfigurable loop filter. - Alireza Abolhasani; Morteza Mousazadeh; Abdollah Khoei (IET Circuits Devices Syst., 2020)

A high-speed, power efficient, dead-zone-less phase frequency detector with differential structure. - Alireza Abolhasani; Morteza Mousazadeh; Abdollah Khoei (Microelectron. J., 2020)

A new high speed and low power decoder/encoder for Radix-4 Booth multiplier. - Mir Majid Ghasemi; Amir Fathi; Morteza Mousazadeh; Abdollah Khoei (Int. J. Circuit Theory Appl., 2021)

A New True Random Number Generator Based on Differential Variable Ring Oscillator Robust Against PVT Variation. - Niloofar Khayyat Salighehdar; Morteza Mousazadeh; Abdolah Khoei (J. Circuits Syst. Comput., 2021)

Instruction Set Extension of a RiscV Based SoC for Driver Drowsiness Detection. - Seyed Kian Mousavikia; Erfan Gholizadehazari; Morteza Mousazadeh; Siddika Berna Örs Yalçin (IEEE Access, 2022)

Hardware implementation of a quantized CNN model for early detection of skin cancer cells using hls4ml tool. - Ehsan Arefi; Morteza Mousazadeh (Neural Comput. Appl., 2025)