Variable bit organization as a new test function for standard memories. - Tomohisa Wada; Masanao Eino; Motomu Ukita; Kenji Anami (IEEE J. Solid State Circuits, 1991)

A 21-mW 4-Mb CMOS SRAM for battery operation. - Shuji Murakami; Kore-aki Fujita; Motomu Ukita; Kazuhito Tsutsumi; Yasuo Inoue; Osamu Sakamoto; Motoi Ashida; Yasumasa Nishimura; Yoshio Kohno; Tadashi Nishimura; Kenji Anami (IEEE J. Solid State Circuits, 1991)

A single-bit-line cross-point cell activation (SCPA) architecture for ultra-low-power SRAM's. - Motomu Ukita; Shuji Murakami; Tadato Yamagata; Hirotada Kuriyama; Yasumasa Nishimura; Kenji Anami (IEEE J. Solid State Circuits, 1993)