An automated test framework for SRAM-based FPGA. - Xuemin Lv; Moucheng Yang; Xuegong Zhou; Lingli Wang (ASICON, 2015)

A scalable hybrid architecture for high performance data-parallel applications. - Moucheng Yang; Jifang Jin; Zhehao Li; Xuegong Zhou; Shaojun Wang; Lingli Wang (FPT, 2017)

A Complete CPU-FPGA Architecture for Protein Identification with Tandem Mass Spectrometry. - Moucheng Yang; Tao Chen 005; Xuegong Zhou; Liang Zhao; Yunping Zhu; Lingli Wang (FPT, 2019)

Parallelized Technology Mapping to General PLBs by Adaptive Circuit Partitioning. - Xiaoxi Wang; Moucheng Yang; Zhen Li; Lingli Wang (FPT, 2021)

DSLUT: An Asymmetric LUT and its Automatic Design Flow Based on Practical Functions. - Moucheng Yang; Kaixiang Zhu; Lingli Wang; Xuegong Zhou (ICFPT, 2023)