TSV stress-aware performance and reliability analysis. - Muhammad Ali 006; Mohammad A. Ahmed; Malgorzata Chrzanowska-Jeske (ICECS, 2012)

Stochastic analysis of CNFET circuits using enhanced logical effort model in the presence of metallic tubes. - Muhammad Ali 006; Mohammad A. Ahmed; Malgorzata Chrzanowska-Jeske (ICECS, 2014)

Logical Effort Framework for CNFET-Based VLSI Circuits for Delay and Area Optimization. - Muhammad Ali 006; Mohammad A. Ahmed; Malgorzata Chrzanowska-Jeske (IEEE Trans. Very Large Scale Integr. Syst., 2019)