Hardwired Networks on Chip in FPGAs to Unify Functional and Con?guration Interconnects. - Kees Goossens; Martijn T. Bennebroek; Jae Young Hur; Muhammad Aqeel Wahlah (NOCS, 2008)

Modeling reconfiguration in a FPGA with a hardwired network on chip. - Muhammad Aqeel Wahlah; Kees Goossens (IPDPS, 2009)

Composable and Persistent-State Application Swapping on FPGAs Using Hardwired Network on Chip. - Muhammad Aqeel Wahlah; Kees Goossens (ReConFig, 2009)

PUMA: Placement Unification with Mapping and Guaranteed Throughput Allocation on an FPGA Using a Hardwired NoC. - Muhammad Aqeel Wahlah; Kees Goossens (DSD, 2011)

A Non-Intrusive Online FPGA Test Scheme Using a Hardwired Network on Chip. - Muhammad Aqeel Wahlah; Kees Goossens (DSD, 2011)

Comparative analysis of soft and hard on-chip interconnects for field-programmable gate arrays. - Jae Young Hur; Kees Goossens; Lotfi Mhamdi; Muhammad Aqeel Wahlah (IET Comput. Digit. Tech., 2012)

Field Programmable Gate Arrays with Hardwired Networks on Chip. - Muhammad Aqeel Wahlah (2012)

TeMNOT: A test methodology for the non-intrusive online testing of FPGA with hardwired network on chip. - Muhammad Aqeel Wahlah; Kees Goossens (Microprocess. Microsystems, 2013)