A GALS Infrastructure for a Massively Parallel Multiprocessor. - Luis A. Plana; Stephen B. Furber; Steve Temple; Muhammad Mukaram Khan; Yebin Shi; Jian Wu; Shufan Yang (IEEE Des. Test Comput., 2007)

The Deferred Event Model for Hardware-Oriented Spiking Neural Networks. - Alexander D. Rast; Xin Jin 003; Muhammad Mukaram Khan; Steve B. Furber (ICONIP (2), 2008)

SpiNNaker: Mapping neural networks onto a massively-parallel chip multiprocessor. - Muhammad Mukaram Khan; David R. Lester; Luis A. Plana; Alexander D. Rast; Xin Jin 003; Eustace Painkras; Stephen B. Furber (IJCNN, 2008)

Virtual synaptic interconnect using an asynchronous network-on-chip. - Alexander D. Rast; Shufan Yang; Muhammad Mukaram Khan; Stephen B. Furber (IJCNN, 2008)

Implementing Learning on the SpiNNaker Universal Neural Chip Multiprocessor. - Xin Jin 003; Alexander D. Rast; Francesco Galluppi; Muhammad Mukaram Khan; Steve B. Furber (ICONIP (1), 2009)

Event-Driven Configuration of a Neural Network CMP System over a Homogeneous Interconnect Fabric. - Muhammad Mukaram Khan; Javier Navaridas; Alexander D. Rast; Xin Jin 003; Luis A. Plana; Mikel Luján; John V. Woods; José Miguel-Alonso; Steve B. Furber (ISPDC, 2009)

Configuring a Massively Parallel CMP system for Real-Time Neural Applications. - Muhammad Mukaram Khan (2009)

Algorithm for Mapping Multilayer BP Networks onto the SpiNNaker Neuromorphic Hardware. - Xin Jin 003; Mikel Luján; Muhammad Mukaram Khan; Luis A. Plana; Alexander D. Rast; Stephen R. Welbourne; Stephen B. Furber (ISPDC, 2010)