FPGA based highly efficient MISTY1 architecture. - Yasir Khizar; Ning Wu; Xin Chen 039; Muhammad Rehan Yahya; Xiaoqiang Zhang 001 (IEICE Electron. Express, 2017)

An Algorithmic Framework to Construct Optical Switch via Scaling From N-to-2N Ports for Optical Network on Chip. - Muhammad Rehan Yahya; Ning Wu; Gaizhen Yan; Tanveer Ahmed; Yasir; Jinbao Zhang 002 (IEEE Access, 2019)

Fault attack hardware Trojan detection method based on ring oscillator. - Qiangjia Bi; Ning Wu; Fang Zhou 001; Jinbao Zhang 002; Muhammad Rehan Yahya; Fen Ge (IEICE Electron. Express, 2019)

RoR: A low insertion loss design of rearrangeable hybrid photonic-plasmonic 6 × 6 non-blocking router for ONoCs. - Muhammad Rehan Yahya; Ning Wu; Gaizhen Yan; Fen Ge; Tanveer Ahmed (IEICE Electron. Express, 2019)

Compact and High Speed Architectures of KASUMI Block Cipher. - Yasir Khizar; Ning Wu; Zain Anwar Ali; Muhammad Mujtaba Shaikh 001; Muhammad Rehan Yahya; Muhammad Aamir 001 (Wirel. Pers. Commun., 2019)

A Dynamic Branch Predictor Based on Parallel Structure of SRNN. - Lei Zhang 106; Ning Wu; Fen Ge; Fang Zhou 001; Mahammad Rehan Yahya (IEEE Access, 2020)

Optical Versus Electrical: Performance Evaluation of Network On-Chip Topologies for UWASN Manycore Processors. - Muhammad Rehan Yahya; Ning Wu; Zain Anwar Ali; Yasir Khizar (Wirel. Pers. Commun., 2021)