Muhammad Shafique
Orcid: 0000-0002-2607-8135Affiliations:
- New York University Abu Dhabi, UAE
- TU Wien, Vienna, Austria (former)
- Karlsruhe Institute of Technology, Germany (former)
According to our database1,
Muhammad Shafique
authored at least 445 papers
between 2007 and 2024.
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Bibliography
2024
CoRR, 2024
SSAP: A Shape-Sensitive Adversarial Patch for Comprehensive Disruption of Monocular Depth Estimation in Autonomous Navigation Applications.
CoRR, 2024
A Two-Level Thermal Cycling-aware Task Mapping Technique for Reliability Management in Manycore Systems.
CoRR, 2024
Embedded Deployment of Semantic Segmentation in Medicine through Low-Resolution Inputs.
CoRR, 2024
MedAide: Leveraging Large Language Models for On-Premise Medical Assistance on Edge Devices.
CoRR, 2024
CoRR, 2024
SpikeNAS: A Fast Memory-Aware Neural Architecture Search Framework for Spiking Neural Network Systems.
CoRR, 2024
TinyCL: An Efficient Hardware Architecture for Continual Learning on Autonomous Systems.
CoRR, 2024
CoRR, 2024
CoRR, 2024
A Comprehensive Survey of Convolutions in Deep Learning: Applications, Challenges, and Future Trends.
IEEE Access, 2024
IEEE Access, 2024
2023
ACM Trans. Design Autom. Electr. Syst., November, 2023
Design and Analysis of High Performance Heterogeneous Block-based Approximate Adders.
ACM Trans. Embed. Comput. Syst., November, 2023
ACM Trans. Embed. Comput. Syst., October, 2023
$\tt{PoisonedGNN}$: Backdoor Attack on Graph Neural Networks-Based Hardware Security Systems.
IEEE Trans. Computers, October, 2023
Delay Prediction for ASIC HLS: Comparing Graph-Based and Nongraph-Based Learning Models.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., April, 2023
ISMatch: A real-time hardware accelerator for inexact string matching of DNA sequences on FPGA.
Microprocess. Microsystems, March, 2023
SeVuc: A study on the Security Vulnerabilities of Capsule Networks against adversarial attacks.
Microprocess. Microsystems, February, 2023
X-Rel: Energy-Efficient and Low-Overhead Approximate Reliability Framework for Error-Tolerant Applications Deployed in Critical Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2023
An Energy-Efficient Generic Accuracy Configurable Multiplier Based on Block-Level Voltage Overscaling.
IEEE Trans. Emerg. Top. Comput., 2023
ReLIEF: A Reinforcement-Learning-Based Real-Time Task Assignment Strategy in Emerging Fault-Tolerant Fog Computing.
IEEE Internet Things J., 2023
Inf., 2023
DAEM: A Data- and Application-Aware Error Analysis Methodology for Approximate Adders.
Inf., 2023
Inf., 2023
CoRR, 2023
ODDR: Outlier Detection & Dimension Reduction Based Defense Against Adversarial Patches.
CoRR, 2023
Tiny-VBF: Resource-Efficient Vision Transformer based Lightweight Beamformer for Ultrasound Single-Angle Plane Wave Imaging.
CoRR, 2023
A Survey on Quantum Machine Learning: Current Trends, Challenges, Opportunities, and the Road Ahead.
CoRR, 2023
Approximate Computing Survey, Part II: Application-Specific & Architectural Approximation Techniques and Applications.
CoRR, 2023
Approximate Computing Survey, Part I: Terminology and Software & Hardware Approximation Techniques.
CoRR, 2023
Scaling Model Checking for DNN Analysis via State-Space Reduction and Input Segmentation (Extended Version).
CoRR, 2023
eFAT: Improving the Effectiveness of Fault-Aware Training for Mitigating Permanent Faults in DNN Hardware Accelerators.
CoRR, 2023
RescueSNN: Enabling Reliable Executions on Spiking Neural Network Accelerators under Permanent Faults.
CoRR, 2023
EnforceSNN: Enabling Resilient and Energy-Efficient Spiking Neural Network Inference considering Approximate DRAMs for Embedded Systems.
CoRR, 2023
PoisonedGNN: Backdoor Attack on Graph Neural Networks-based Hardware Security Systems.
CoRR, 2023
ISimDL: Importance Sampling-Driven Acceleration of Fault Injection Simulations for Evaluating the Robustness of Deep Learning.
CoRR, 2023
AutoEnsemble: Automated Ensemble Search Framework for Semantic Segmentation Using Image Labels.
CoRR, 2023
Exploring Weakly Supervised Semantic Segmentation Ensembles for Medical Imaging Systems.
CoRR, 2023
CoRR, 2023
BoundaryCAM: A Boundary-based Refinement Framework for Weakly Supervised Semantic Segmentation of Medical Images.
CoRR, 2023
DNN-Alias: Deep Neural Network Protection Against Side-Channel Attacks via Layer Balancing.
CoRR, 2023
SHIELD: An Adaptive and Lightweight Defense against the Remote Power Side-Channel Attacks on Multi-tenant FPGAs.
CoRR, 2023
autoXFPGAs: An End-to-End Automated Exploration Framework for Approximate Accelerators in FPGA-Based Systems.
CoRR, 2023
CAE-CNNLoc: An Edge-based WiFi Fingerprinting Indoor Localization Using Convolutional Neural Network and Convolutional Auto-Encoder.
CoRR, 2023
scaleTRIM: Scalable TRuncation-Based Integer Approximate Multiplier with Linearization and Compensation.
CoRR, 2023
APARATE: Adaptive Adversarial Patch for CNN-based Monocular Depth Estimation for Autonomous Navigation.
CoRR, 2023
UnbiasedNets: A Dataset Diversification Framework for Robustness Bias Alleviation in Neural Networks.
CoRR, 2023
FPUS23: An Ultrasound Fetus Phantom Dataset With Deep Neural Network Evaluations for Fetus Orientations, Fetal Planes, and Anatomical Features.
IEEE Access, 2023
Physical Adversarial Attacks for Camera-Based Smart Systems: Current Trends, Categorization, Applications, Research Challenges, and Future Outlook.
IEEE Access, 2023
Proceedings of the 29th IEEE Real-Time and Embedded Technology and Applications Symposium, 2023
ReFit: A Framework for Refinement of Weakly Supervised Semantic Segmentation Using Object Border Fitting for Medical Images.
Proceedings of the Advances in Visual Computing - 18th International Symposium, 2023
Proceedings of the Advances in Visual Computing - 18th International Symposium, 2023
FPGA-Patch: Mitigating Remote Side-Channel Attacks on FPGAs using Dynamic Patch Generation.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2023
TopSpark: A Timestep Optimization Methodology for Energy-Efficient Spiking Neural Networks on Autonomous Mobile Agents.
IROS, 2023
ShapeShifter: Protecting FPGAs from Side-Channel Attacks with Isofunctional Heterogeneous Modules.
Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023
FastCaps: A Design Methodology for Accelerating Capsule Network on Field Programmable Gate Arrays.
Proceedings of the International Joint Conference on Neural Networks, 2023
SILOP: An Automated Framework for Semantic Segmentation Using Image Labels Based on Object Perimeters.
Proceedings of the International Joint Conference on Neural Networks, 2023
RobCaps: Evaluating the Robustness of Capsule Networks against Affine Transformations and Adversarial Attacks.
Proceedings of the International Joint Conference on Neural Networks, 2023
Proceedings of the International Joint Conference on Neural Networks, 2023
FAQ: Mitigating the Impact of Faults in the Weight Memory of DNN Accelerators through Fault-Aware Quantization.
Proceedings of the International Joint Conference on Neural Networks, 2023
Proceedings of the International Joint Conference on Neural Networks, 2023
Poster: Link between Bias, Node Sensitivity and Long-Tail Distribution in trained DNNs.
Proceedings of the IEEE Conference on Software Testing, Verification and Validation, 2023
Xel-FPGAs: An End-to-End Automated Exploration Framework for Approximate Accelerators in FPGA-Based Systems.
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
Mantis: Enabling Energy-Efficient Autonomous Mobile Agents with Spiking Neural Networks.
Proceedings of the 9th International Conference on Automation, Robotics and Applications, 2023
Cross-Layer Approximations for System-Level Optimizations: Challenges and Opportunities.
Proceedings of the 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2023
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Emerging Trends in Multi-Accelerator and Distributed System for ML: Devices, Architectures, Tools and Applications.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2023
Physical Backdoor Trigger Activation of Autonomous Vehicle Using Reachability Analysis.
Proceedings of the 62nd IEEE Conference on Decision and Control, 2023
2022
ACM Trans. Embed. Comput. Syst., November, 2022
ACM Trans. Embed. Comput. Syst., September, 2022
Microprocess. Microsystems, February, 2022
IEEE Trans. Emerg. Top. Comput., 2022
GNNUnlock+: A Systematic Methodology for Designing Graph Neural Networks-Based Oracle-Less Unlocking Schemes for Provably Secure Logic Locking.
IEEE Trans. Emerg. Top. Comput., 2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
High-Performance Accurate and Approximate Multipliers for FPGA-Based Hardware Accelerators.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
ForASec: Formal Analysis of Hardware Trojan-Based Security Vulnerabilities in Sequential Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022
Continual Learning for Real-World Autonomous Systems: Algorithms, Challenges and Frameworks.
J. Intell. Robotic Syst., 2022
ATLAS: An IoT Architecture and Secure Open-source Networking Stack for Anonymous Localization and Tracking Using Smartphones and Bluetooth Beacons.
CoRR, 2022
Building Resilience to Out-of-Distribution Visual Data via Input Optimization and Model Finetuning.
CoRR, 2022
PiDAn: A Coherence Optimization Approach for Backdoor Attack Detection and Mitigation in Deep Neural Networks.
CoRR, 2022
Commun. ACM, 2022
AccelAT: A Framework for Accelerating the Adversarial Training of Deep Neural Networks Through Accuracy Gradient.
IEEE Access, 2022
RoHNAS: A Neural Architecture Search Framework With Conjoint Optimization for Adversarial Robustness and Hardware Efficiency of Convolutional and Capsule Networks.
IEEE Access, 2022
Special Session: Towards an Agile Design Methodology for Efficient, Reliable, and Secure ML Systems.
Proceedings of the 40th IEEE VLSI Test Symposium, 2022
Enabling Capsule Networks at the Edge through Approximate Softmax and Squash Operations.
Proceedings of the ISLPED '22: ACM/IEEE International Symposium on Low Power Electronics and Design, Boston, MA, USA, August 1, 2022
LaneSNNs: Spiking Neural Networks for Lane Detection on the Loihi Neuromorphic Processor.
Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, 2022
enpheeph: A Fault Injection Framework for Spiking and Compressed Deep Neural Networks.
Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, 2022
EDAML 2022 Invited Speaker 8: Machine Learning for Cross-Layer Reliability and Security.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022
lpSpikeCon: Enabling Low-Precision Spiking Neural Network Processing for Efficient Unsupervised Continual Learning on Autonomous Agents.
Proceedings of the International Joint Conference on Neural Networks, 2022
fakeWeather: Adversarial Attacks for Deep Neural Networks Emulating Weather Conditions on the Camera Lens of Autonomous Systems.
Proceedings of the International Joint Conference on Neural Networks, 2022
CoNLoCNN: Exploiting Correlation and Non-Uniform Quantization for Energy-Efficient Low-precision Deep Convolutional Neural Networks.
Proceedings of the International Joint Conference on Neural Networks, 2022
Proceedings of the International Joint Conference on Neural Networks, 2022
Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, 2022
MuxLink: Circumventing Learning-Resilient MUX-Locking Using Graph Neural Network-based Link Prediction.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
SoftSNN: low-cost fault tolerance for spiking neural network accelerators under soft errors.
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
ROMANet: Fine-Grained Reuse-Driven Off-Chip Memory Access Management and Data Organization for Deep Neural Network Accelerators.
IEEE Trans. Very Large Scale Integr. Syst., 2021
FEECA: Design Space Exploration for Low-Latency and Energy-Efficient Capsule Network Accelerators.
IEEE Trans. Very Large Scale Integr. Syst., 2021
IEEE Trans. Circuits Syst. II Express Briefs, 2021
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021
Longevity Framework: Leveraging Online Integrated Aging-Aware Hierarchical Mapping and VF-Selection for Lifetime Reliability Optimization in Manycore Processors.
IEEE Trans. Computers, 2021
IEEE Trans. Computers, 2021
Analyzing the interaction of hybrid base liquid C<sub>2</sub>H<sub>6</sub>O<sub>2</sub>-H<sub>2</sub>O with hybrid nano-material Ag-MoS<sub>2</sub> for unsteady rotational flow referred to an elongated surface using modified Buongiorno's model: FEM simulation.
Math. Comput. Simul., 2021
J. Syst. Archit., 2021
BioNetExplorer: Architecture-Space Exploration of Biosignal Processing Deep Neural Networks for Wearables.
IEEE Internet Things J., 2021
CARiMoL: A Configurable Hardware Accelerator for Ringand Module Lattice-Based Post-Quantum Cryptography.
IACR Cryptol. ePrint Arch., 2021
BioNetExplorer: Architecture-Space Exploration of Bio-Signal Processing Deep Neural Networks for Wearables.
CoRR, 2021
Side-Channel Attacks on RISC-V Processors: Current Progress, Challenges, and Opportunities.
CoRR, 2021
High Performance and Optimal Configuration of Accurate Heterogeneous Block-Based Approximate Adder.
CoRR, 2021
Exploiting Vulnerabilities in Deep Neural Networks: Adversarial and Fault-Injection Attacks.
CoRR, 2021
TiQSA: Workload Minimization in Convolutional Neural Networks Using Tile Quantization and Symmetry Approximation.
IEEE Access, 2021
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021
R-SNN: An Analysis and Design Methodology for Robustifying Spiking Neural Networks against Adversarial Attacks through Noise Filters for Dynamic Vision Sensors.
Proceedings of the IEEE/RSJ International Conference on Intelligent Robots and Systems, 2021
CarSNN: An Efficient Spiking Neural Network for Event-Based Autonomous Cars on the Loihi Neuromorphic Research Processor.
Proceedings of the International Joint Conference on Neural Networks, 2021
Proceedings of the International Joint Conference on Neural Networks, 2021
DVS-Attacks: Adversarial Attacks on Dynamic Vision Sensors for Spiking Neural Networks.
Proceedings of the International Joint Conference on Neural Networks, 2021
Proceedings of the IEEE/CVF International Conference on Computer Vision Workshops, 2021
ReSpawn: Energy-Efficient Fault-Tolerance for Spiking Neural Networks considering Unreliable Memories.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
UNTANGLE: Unlocking Routing and Logic Obfuscation Using Graph Neural Networks-based Link Prediction.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Towards Energy-Efficient and Secure Edge AI: A Cross-Layer Framework ICCAD Special Session Paper.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021
Emerging Computing Devices: Challenges and Opportunities for Test and Reliability<sup>*</sup>.
Proceedings of the 26th IEEE European Test Symposium, 2021
TRe-Map: Towards Reducing the Overheads of Fault-Aware Retraining of Deep Neural Networks by Merging Fault Maps.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021
DNN-Life: An Energy-Efficient Aging Mitigation Framework for Improving the Lifetime of On-Chip Weight Memories in Deep Neural Network Hardware Architectures.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
Securing Deep Spiking Neural Networks against Adversarial Attacks through Inherent Structural Parameters.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
MLComp: A Methodology for Machine Learning-based Performance Estimation and Adaptive Selection of Pareto-Optimal Compiler Optimization Sequences.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
GNNUnlock: Graph Neural Networks-based Oracle-less Unlocking Scheme for Provably Secure Logic Locking.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021
SparkXD: A Framework for Resilient and Energy-Efficient Spiking Neural Network Inference using Approximate DRAM.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
SpikeDyn: A Framework for Energy-Efficient Spiking Neural Networks with Continual and Unsupervised Learning Capabilities in Dynamic Environments.
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021
Proceedings of the CODES/ISSS 2021, 2021
2020
Guest Editorial: Special Issue on Architectures and Design Methods for Neural Networks.
J. Signal Process. Syst., 2020
IEEE Trans. Parallel Distributed Syst., 2020
FSpiNN: An Optimization Framework for Memory-Efficient and Energy-Efficient Spiking Neural Networks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
MacLeR: Machine Learning-Based Runtime Hardware Trojan Detection in Resource-Constrained IoT Edge Devices.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
Toward Model Checking-Driven Fair Comparison of Dynamic Thermal Management Techniques Under Multithreaded Workloads.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
SuperSlash: A Unified Design Space Exploration and Model Compression Methodology for Design of Deep Learning Accelerators With Reduced Off-Chip Memory Access Volume.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020
SIMCom: Statistical sniffing of inter-module communications for runtime hardware trojan detection.
Microprocess. Microsystems, 2020
ACM J. Emerg. Technol. Comput. Syst., 2020
An Updated Survey of Efficient Hardware Architectures for Accelerating Deep Convolutional Neural Networks.
Future Internet, 2020
IEEE Des. Test, 2020
Robust Machine Learning Systems: Challenges, Current Trends, Perspectives, and the Road Ahead.
IEEE Des. Test, 2020
MacLeR: Machine Learning-based Run-Time Hardware Trojan Detection in Resource-Constrained IoT Edge Devices.
CoRR, 2020
FSpiNN: An Optimization Framework for Memory- and Energy-Efficient Spiking Neural Networks.
CoRR, 2020
Probabilistic Analysis of Targeted Attacks Using Transform-Domain Adversarial Examples.
IEEE Access, 2020
CAxCNN: Towards the Use of Canonic Sign Digit Based Approximation for Hardware-Friendly Convolutional Neural Networks.
IEEE Access, 2020
xUAVs: Towards Efficient Approximate Computing for UAVs - Low Power Approximate Adders With Single LUT Delay for FPGA-Based Aerial Imaging Optimization.
IEEE Access, 2020
Hardware and Software Optimizations for Accelerating Deep Neural Networks: Survey of Current Trends, Challenges, and the Road Ahead.
IEEE Access, 2020
Peak-Power-Aware Primary-Backup Technique for Efficient Fault-Tolerance in Multicore Embedded Systems.
IEEE Access, 2020
APNAS: Accuracy-and-Performance-Aware Neural Architecture Search for Neural Hardware Accelerators.
IEEE Access, 2020
Proceedings of the SCOPES '20: 23rd International Workshop on Software and Compilers for Embedded Systems, 2020
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020
Dependable Deep Learning: Towards Cost-Efficient Resilience of Deep Neural Network Accelerators against Soft Errors and Permanent Faults.
Proceedings of the 26th IEEE International Symposium on On-Line Testing and Robust System Design, 2020
NeuroAttack: Undermining Spiking Neural Networks Security through Externally Triggered Bit-Flips.
Proceedings of the 2020 International Joint Conference on Neural Networks, 2020
An Efficient Spiking Neural Network for Recognizing Gestures with a DVS Camera on the Loihi Neuromorphic Processor.
Proceedings of the 2020 International Joint Conference on Neural Networks, 2020
Is Spiking Secure? A Comparative Study on the Security Vulnerabilities of Spiking and Deep Neural Networks.
Proceedings of the 2020 International Joint Conference on Neural Networks, 2020
FasTrCaps: An Integrated Framework for Fast yet Accurate Training of Capsule Networks.
Proceedings of the 2020 International Joint Conference on Neural Networks, 2020
Proceedings of the 2020 International Joint Conference on Neural Networks, 2020
NASCaps: A Framework for Neural Architecture Search to Optimize the Accuracy and Hardware Efficiency of Convolutional Capsule Networks.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
AxHLS: Design Space Exploration and High-Level Synthesis of Approximate Accelerators using Approximate Functional Units and Analytical Models.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020
FANNet: Formal Analysis of Noise Tolerance, Training Bias and Input Sensitivity in Neural Networks.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
ReD-CaNe: A Systematic Methodology for Resilience Analysis and Design of Capsule Networks under Approximations.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
FT-ClipAct: Resilience Analysis of Deep Neural Networks and Improving their Fault Tolerance using Clipped Activation.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
DRMap: A Generic DRAM Data Mapping Policy for Energy-Efficient Processing of Convolutional Neural Networks.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
ApproxFPGAs: Embracing ASIC-Based Approximate Arithmetic Components for FPGA-Based Systems.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
EMAP: A Cloud-Edge Hybrid Framework for EEG Monitoring and Cross-Correlation Based Real-time Anomaly Prediction.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
PEMACx: A Probabilistic Error Analysis Methodology for Adders with Cascaded Approximate Units.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
A Fast Design Space Exploration Framework for the Deep Learning Accelerators: Work-in-Progress.
Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2020
Towards Quality-Driven Approximate Software Generation for Accurate Hardware: Work-in-Progress.
Proceedings of the International Conference on Compilers, 2020
2019
ACM Trans. Embed. Comput. Syst., 2019
IEEE Trans. Circuits Syst. Video Technol., 2019
Microelectron. J., 2019
m-SAAC: Multi-stage adaptive approximation control to select approximate computing modes for vision applications.
Microelectron. J., 2019
J. Low Power Electron., 2019
Application and Thermal-reliability-aware Reinforcement Learning Based Multi-core Power Management.
ACM J. Emerg. Technol. Comput. Syst., 2019
Computer-aided Arrhythmia Diagnosis with Bio-signal Processing: A Survey of Trends and Techniques.
ACM Comput. Surv., 2019
X-TrainCaps: Accelerated Training of Capsule Nets through Lightweight Software Optimizations.
CoRR, 2019
ROMANet: Fine-Grained Reuse-Driven Data Organization and Off-Chip Memory Access Management for Deep Neural Network Accelerators.
CoRR, 2019
CapStore: Energy-Efficient Design and Management of the On-Chip Memory for CapsuleNet Inference Accelerators.
CoRR, 2019
SNN under Attack: are Spiking Deep Belief Networks vulnerable to Adversarial Examples?
CoRR, 2019
CoRR, 2019
CoRR, 2019
SIMCom: Statistical Sniffing of Inter-Module Communications for Run-time Hardware Trojan Detection.
CoRR, 2019
Systimator: A Design Space Exploration Methodology for Systolic Array based CNNs Acceleration on the FPGA-based Edge Nodes.
CoRR, 2019
IEEE Access, 2019
Architectural-Space Exploration of Heterogeneous Reliability and Checkpointing Modes for Out-of-Order Superscalar Processors.
IEEE Access, 2019
IEEE Access, 2019
Deep Learning for Edge Computing: Current Trends, Cross-Layer Optimizations, and Open Research Challenges.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
MemGANs: Memory Management for Energy-Efficient Acceleration of Complex Computations in Hardware Architectures for Generative Adversarial Networks.
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
Studying Aging and Soft Error Mitigation Jointly under Constrained Scenarios in Multi-Cores.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
TrISec: Training Data-Unaware Imperceptible Security Attacks on Deep Neural Networks.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
QuSecNets: Quantization-based Defense Mechanism for Securing Deep Neural Network against Adversarial Attacks.
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
ALWANN: Automatic Layer-Wise Approximation of Deep Neural Network Accelerators without Retraining.
Proceedings of the International Conference on Computer-Aided Design, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
FAdeML: Understanding the Impact of Pre-Processing Noise Filtering on Adversarial Machine Learning.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
TransRec: Improving Adaptability in Single-ISA Heterogeneous Systems with Transparent and Reconfigurable Acceleration.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
TrojanZero: Switching Activity-Aware Design of Undetectable Hardware Trojans with Zero Power and Area Footprint.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Building Robust Machine Learning Systems: Current Progress, Research Challenges, and Opportunities.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
LifeGuard: A Reinforcement Learning-Based Task Mapping Strategy for Performance-Centric Aging Management.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
autoAx: An Automatic Design Space Exploration and Circuit Building Methodology utilizing Libraries of Approximate Components.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
Proceedings of the Approximate Circuits, Methodologies and CAD., 2019
Approximate Multi-Accelerator Tiled Architecture for Energy-Efficient Motion Estimation.
Proceedings of the Approximate Circuits, Methodologies and CAD., 2019
Proceedings of the Approximate Circuits, Methodologies and CAD., 2019
Proceedings of the Approximate Circuits, Methodologies and CAD., 2019
Proceedings of the Approximate Circuits, Methodologies and CAD., 2019
2018
IEEE Trans. Sustain. Comput., 2018
IEEE Trans. Computers, 2018
IEEE Trans. Computers, 2018
IEEE Micro, 2018
X-DNNs: Systematic Cross-Layer Approximations for Energy-Efficient Deep Neural Networks.
J. Low Power Electron., 2018
SmartDPM: Machine Learning-Based Dynamic Power Management for Multi-Core Microprocessors.
J. Low Power Electron., 2018
IEEE Des. Test, 2018
CoRR, 2018
Heterogeneous Reliability Modes with Efficient State Compression for Out-of-Order Superscalar Processors.
CoRR, 2018
A Methodology for Automatic Selection of Activation Functions to Design Hybrid Deep Neural Networks.
CoRR, 2018
SSCNets: A Selective Sobel Convolution-based Technique to Enhance the Robustness of Deep Neural Networks against Security Attacks.
CoRR, 2018
ISA4ML: Training Data-Unaware Imperceptible Security Attacks on Machine Learning Modules of Autonomous Vehicles.
CoRR, 2018
MPNA: A Massively-Parallel Neural Array Accelerator with Dataflow Optimization for Convolutional Neural Networks.
CoRR, 2018
CoRR, 2018
McSeVIC: A Model Checking Based Framework for Security Vulnerability Analysis of Integrated Circuits.
IEEE Access, 2018
Adv. Comput., 2018
Proceedings of the 2018 New Generation of CAS, 2018
Proceedings of the 12th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2018
Robustness for Smart Cyber Physical Systems and Internet-of-Things: From Adaptive Robustness Methods to Reliability and Security for Machine Learning.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018
Low Power Digital Clock Multipliers for Battery-Operated Internet of Things (IoT) Devices.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
FPGA-Based Convolutional Neural Network Architecture with Reduced Parameter Requirements.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018
Proceedings of the 2018 International Joint Conference on Neural Networks, 2018
Security for Machine Learning-Based Systems: Attacks and Challenges During Training and Inference.
Proceedings of the 2018 International Conference on Frontiers of Information Technology, 2018
Proceedings of the Workshop on INTelligent Embedded Systems Architectures and Applications, 2018
Proceedings of the 21st Euromicro Conference on Digital System Design, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
HiMap: A hierarchical mapping approach for enhancing lifetime reliability of dark silicon manycore systems.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
DeMAS: An efficient design methodology for building approximate adders for FPGA-based systems.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Error resilience analysis for systematically employing approximate computing in convolutional neural networks.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
An overview of next-generation architectures for machine learning: Roadmap, opportunities and challenges in the IoT era.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators.
Proceedings of the 55th Annual Design Automation Conference, 2018
Proceedings of the 55th Annual Design Automation Conference, 2018
Approximate on-the-fly coarse-grained reconfigurable acceleration for general-purpose applications.
Proceedings of the 55th Annual Design Automation Conference, 2018
An Optimized Partial-Distortion-Elimination Based Sum-of-Absolute-Differences Architecture for High-Efficiency-Video-Coding.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2018
2017
Design Space Exploration and Run-Time Adaptation for Multicore Resource Management Under Performance and Power Constraints.
Proceedings of the Handbook of Hardware/Software Codesign., 2017
IEEE Trans. Parallel Distributed Syst., 2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Application-Guided Power-Efficient Fault Tolerance for H.264 Context Adaptive Variable Length Coding.
IEEE Trans. Computers, 2017
Thermal Safe Power (TSP): Efficient Power Budgeting for Heterogeneous Manycore Systems in Dark Silicon.
IEEE Trans. Computers, 2017
IEEE Trans. Computers, 2017
Fine-Grained Checkpoint Recovery for Application-Specific Instruction-Set Processors.
IEEE Trans. Computers, 2017
IEEE Trans. Computers, 2017
ACM Trans. Archit. Code Optim., 2017
FAMe-TM: Formal analysis methodology for task migration algorithms in Many-Core systems.
Sci. Comput. Program., 2017
J. Real Time Image Process., 2017
Theorem proving based Formal Verification of Distributed Dynamic Thermal Management schemes.
J. Parallel Distributed Comput., 2017
IEEE Des. Test, 2017
Adaptive and Energy-Efficient Architectures for Machine Learning: Challenges, Opportunities, and Research Roadmap.
Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017
Proceedings of the 20th IEEE International Symposium on Real-Time Distributed Computing, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Embracing approximate computing for energy-efficient motion estimation in high efficiency video coding.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
CAnDy-TM: Comparative analysis of dynamic thermal management in many-cores using model checking.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Soft error-aware architectural exploration for designing reliability adaptive cache hierarchies in multi-cores.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
2016
Analysis and Mapping for Thermal and Energy Efficiency of 3-D Video Processing on 3-D Multicore Processors.
IEEE Trans. Very Large Scale Integr. Syst., 2016
Two-State Checkpointing for Energy-Efficient Fault Tolerance in Hard Real-Time Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2016
IEEE Trans. Very Large Scale Integr. Syst., 2016
ACM Trans. Embed. Comput. Syst., 2016
Resource and Throughput Aware Execution Trace Analysis for Efficient Run-Time Mapping on MPSoCs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
IEEE Trans. Computers, 2016
IEEE Trans. Computers, 2016
IEEE Trans. Computers, 2016
Task Mapping for Redundant Multithreading in Multi-Cores with Reliability and Performance Heterogeneity.
IEEE Trans. Computers, 2016
IEEE Des. Test, 2016
Cross-Layer Reliability Modeling and Optimization: Compiler and Run-Time System Interactions.
Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems, 2016
Proceedings of the 35th International Conference on Computer-Aided Design, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Formal probabilistic analysis of distributed resource management schemes in on-chip systems.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
Proceedings of the 53rd Annual Design Automation Conference, 2016
An area-efficient consolidated configurable error correction for approximate hardware accelerators.
Proceedings of the 53rd Annual Design Automation Conference, 2016
ageOpt-RMT: compiler-driven variation-aware aging optimization for redundant multithreading.
Proceedings of the 53rd Annual Design Automation Conference, 2016
Power and thermal management in massive multicore chips: theoretical foundation meets architectural innovation and resource allocation.
Proceedings of the 2016 International Conference on Compilers, 2016
Springer, ISBN: 978-3-319-25770-9, 2016
2015
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
A Reconfigurable Hardware Architecture for Fractional Pixel Interpolation in High Efficiency Video Coding.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
Probabilistic Formal Verification Methodology for Decentralized Thermal Management in On-Chip Systems.
Proceedings of the 24th IEEE International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises, 2015
Proceedings of the 9th International Symposium on Networks-on-Chip, 2015
DRVS: Power-efficient reliability management through Dynamic Redundancy and Voltage Scaling under variations.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2015
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015
Proceedings of the 13th IEEE Symposium on Embedded Systems For Real-time Multimedia, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
MatEx: efficient transient and peak temperature computation for compact thermal models.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
ACSEM: accuracy-configurable fast soft error masking analysis in combinatorial circuits.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
A deblocking filter hardware architecture for the high efficiency video coding standard.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Thermal constrained resource management for mixed ILP-TLP workloads in dark silicon chips.
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
dsReliM: Power-constrained reliability management in Dark-Silicon many-core chips under process variations.
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015
R<sup>2</sup>Cache: Reliability-aware reconfigurable last-level cache architecture for multi-cores.
Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015
Proceedings of the 2015 International Conference on Compilers, 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience.
Microelectron. Reliab., 2014
Hardware/Software Co-design of Embedded Real-Time KD-Tree Based Feature Matching Systems.
Proceedings of the Advances in Visual Computing - 10th International Symposium, 2014
Content-driven memory pressure balancing and video memory power management for parallel high efficiency video coding.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
Proceedings of the International Symposium on Low Power Electronics and Design, 2014
Peak Power Management for scheduling real-time tasks on heterogeneous many-core systems.
Proceedings of the 20th IEEE International Conference on Parallel and Distributed Systems, 2014
Power efficient and workload balanced tiling for parallelized high efficiency video coding.
Proceedings of the 2014 IEEE International Conference on Image Processing, 2014
Proceedings of the 2014 IEEE International Conference on Image Processing, 2014
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2014
Formal Verification of Distributed Task Migration for Thermal Management in On-Chip Multi-core Systems Using nuXmv.
Proceedings of the Formal Techniques for Safety-Critical Systems, 2014
Run-time accelerator binding for tile-based mixed-grained reconfigurable architectures.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014
Proceedings of the 2014 International Conference on Embedded Software, 2014
dSVM: Energy-efficient distributed Scratchpad Video Memory Architecture for the next-generation High Efficiency Video Coding.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Compiler-driven dynamic reliability management for on-chip systems under variabilities.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
hevcDTM: Application-driven Dynamic Thermal Management for High Efficiency Video Coding.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Software architecture of High Efficiency Video Coding for many-core systems with power-efficient workload balancing.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
The EDA Challenges in the Dark Silicon Era: Temperature, Reliability, and Variability Perspectives.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
dTune: Leveraging Reliable Code Generation for Adaptive Dependability Tuning under Process Variation and Aging-Induced Effects.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
ASER: Adaptive Soft Error Resilience for Reliability-Heterogeneous Processors in the Dark Silicon Era.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
darkNoC: Designing Energy-Efficient Network-on-Chip with Multi-Vt Cells for Dark Silicon.
Proceedings of the 51st Annual Design Automation Conference 2014, 2014
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014
TSP: Thermal Safe Power - Efficient power budgeting for many-core systems in dark silicon.
Proceedings of the 2014 International Conference on Hardware/Software Codesign and System Synthesis, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
Model Predictive Hierarchical Rate Control With Markov Decision Process for Multiview Video Coding.
IEEE Trans. Circuits Syst. Video Technol., 2013
Reliable code generation and execution on unreliable hardware under joint functional and timing reliability considerations.
Proceedings of the 19th IEEE Real-Time and Embedded Technology and Applications Symposium, 2013
Fast HEVC intra mode decision algorithm based on new evaluation order in the Coding Tree Block.
Proceedings of the 30th Picture Coding Symposium, 2013
Content-driven adaptive computation offloading for energy-aware hybrid distributed video coding.
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
Content-adaptive reference frame compression based on intra-frame prediction for multiview video coding.
Proceedings of the IEEE International Conference on Image Processing, 2013
An adaptive complexity reduction scheme with fast prediction unit decision for HEVC intra encoding.
Proceedings of the IEEE International Conference on Image Processing, 2013
Proceedings of the IEEE International Conference on Image Processing, 2013
High-throughput interpolation hardware architecture with coarse-grained reconfigurable datapaths for HEVC.
Proceedings of the IEEE International Conference on Image Processing, 2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
ISOMER: integrated selection, partitioning, and placement methodology for reconfigurable architectures.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
DHASER: dynamic heterogeneous adaptation for soft-error resiliency in ASIP-based multi-core systems.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Energy-efficient memory hierarchy for motion and disparity estimation in multiview video coding.
Proceedings of the Design, Automation and Test in Europe, 2013
Leveraging variable function resilience for selective software reliability on unreliable hardware.
Proceedings of the Design, Automation and Test in Europe, 2013
CSER: HW/SW configurable soft-error resiliency for application specific instruction-set processors.
Proceedings of the Design, Automation and Test in Europe, 2013
Hardware-software collaborative complexity reduction scheme for the emerging HEVC intra encoder.
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Exploiting program-level masking and error propagation for constrained reliability optimization.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
3D Video Coding for Embedded Devices - Energy Efficient Algorithms and Architectures.
Springer, ISBN: 978-1-4614-6758-8, 2013
2012
VLSI Circuits, Systems, and Architectures for Advanced Image and Video Compression Standards.
VLSI Design, 2012
A complexity reduction scheme with adaptive search direction and mode elimination for multiview video coding.
Proceedings of the 2012 Picture Coding Symposium, 2012
A Model Predictive Controller for Frame-Level Rate Control in Multiview Video Coding.
Proceedings of the 2012 IEEE International Conference on Multimedia and Expo, 2012
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012
Power-efficient error-resiliency for H.264/AVC Context-Adaptive Variable Length Coding.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
A hierarchical control scheme for energy quota distribution in hybrid distributed video coding.
Proceedings of the 10th International Conference on Hardware/Software Codesign and System Synthesis, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Proceedings of the 18th IEEE International Conference on Image Processing, 2011
Proceedings of the 18th IEEE International Conference on Image Processing, 2011
Revc: Computationally Reliable Video Coding on unreliable hardware platforms: A case study on error-tolerant H.264/AVC CAVLC entropy coding.
Proceedings of the 18th IEEE International Conference on Image Processing, 2011
A low-power memory architecture with application-aware power management for motion & disparity estimation in Multiview Video Coding.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
System-level application-aware dynamic power management in adaptive pipelined MPSoCs for multimedia.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
Run-Time Resource Allocation for Simultaneous Multi-tasking in Multi-core Reconfigurable Processors.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011
Multi-level pipelined parallel hardware architecture for high throughput motion and disparity estimation in Multiview Video Coding.
Proceedings of the Design, Automation and Test in Europe, 2011
Minority-Game-based resource allocation for run-time reconfigurable multi-core processors.
Proceedings of the Design, Automation and Test in Europe, 2011
mRTS: Run-time system for reconfigurable processors with multi-grained instruction-set extensions.
Proceedings of the Design, Automation and Test in Europe, 2011
Run-time adaptive energy-aware motion and disparity estimation in multiview video coding.
Proceedings of the 48th Design Automation Conference, 2011
Low-power adaptive pipelined MPSoCs for multimedia: an H.264 video encoder case study.
Proceedings of the 48th Design Automation Conference, 2011
Reliable software for unreliable hardware: embedded code generation aiming at reliability.
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011
Adaptive resource management for simultaneous multitasking in mixed-grained reconfigurable multi-core processors.
Proceedings of the 9th International Conference on Hardware/Software Codesign and System Synthesis, 2011
Concepts, architectures, and run-time systems for efficient and adaptive reconfigurable processors.
Proceedings of the 2011 NASA/ESA Conference on Adaptive Hardware and Systems, 2011
Springer, ISBN: 978-1-4419-9691-6, 2011
2010
Optimizing the H.264/AVC Video Encoder Application Structure for Reconfigurable and Application-Specific Platforms.
J. Signal Process. Syst., 2010
Proceedings of the Picture Coding Symposium, 2010
Proceedings of the Picture Coding Symposium, 2010
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
An HVS-based Adaptive Computational Complexity Reduction Scheme for H.264/AVC video encoder using Prognostic Early Mode Exclusion.
Proceedings of the Design, Automation and Test in Europe, 2010
enBudget: A Run-Time Adaptive Predictive Energy-Budgeting scheme for energy-aware Motion Estimation in H.264/MPEG-4 AVC video encoder.
Proceedings of the Design, Automation and Test in Europe, 2010
KAHRISMA: A novel Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array architecture.
Proceedings of the Design, Automation and Test in Europe, 2010
2009
Non-linear rate control for H.264/AVC video encoder with multiple picture types using image-statistics and motion-based Macroblock Prioritization.
Proceedings of the International Conference on Image Processing, 2009
REMiS: Run-time energy minimization scheme in a reconfigurable processor with dynamic power-gated instruction set.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
A parallel approach for high performance hardware design of intra prediction in H.264/AVC Video Codec.
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the Design, Automation and Test in Europe, 2009
MinDeg: a performance-guided replacement policy for run-time reconfigurable accelerators.
Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, 2009
2008
Efficient Resource Utilization for an Extensible Processor Through Dynamic Instruction Set Adaptation.
IEEE Trans. Very Large Scale Integr. Syst., 2008
3-tier dynamically adaptive power-aware motion estimator for h.264/AVC video encoding.
Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008
A computation- and communication- infrastructure for modular special instructions in a dynamically reconfigurable processor.
Proceedings of the FPL 2008, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the 45th Design Automation Conference, 2008
2007
Proceedings of the First International Conference on Self-Adaptive and Self-Organizing Systems, 2007
An Optimized Application Architecture of the H.264 Video Encoder for Application Specific Platforms.
Proceedings of the 2007 5th Workshop on Embedded Systems for Real-Time Multimedia, 2007
Proceedings of the 44th Design Automation Conference, 2007