Low Stand-By Power and Process Variation Tolerant FinFET Based SRAM Cell. - Akanksha Bhadoria; Mukesh Chaturvedi; Vikas Mahor; Manisha Pattanaik (iNIS, 2016)

FinFET-Based Low Power Address Decoder under Process Variation. - Mukesh Chaturvedi; Akanksha Bhadoria; Vikas Mahor; Manisha Pattanaik (iNIS, 2016)

Load-line Dependent Current Filament Dynamics in N anoscale SCR Devices. - Mitesh Goyal; Mukesh Chaturvedi; Raju Kumar; Mahesh Vaidya; Mayank Shrivastava (IRPS, 2024)

Missing Trigger Circuit Action and Device Engineering for Conventional Nanoscale SCR. - Mitesh Goyal; Mukesh Chaturvedi; Raju Kumar; Mahesh Vaidya; Mayank Shrivastava (IRPS, 2024)

Novel Trigger Circuit & SCR Device Co-Engineering Based Local (I/O-VSS & I/O-VDD) ESD Clamp Concepts with Improved Latch-Up Susceptibility, Lower Leakage and Lower Capacitance for Ultra High Speed I/Os. - Mitesh Goyal; Mukesh Chaturvedi; Harihar Nath; Mahesh Vaidya; Mayank Shrivastava (IRPS, 2025)