Volume accumulated double gate junctionless MOSFETs for low power logic technology applications. - Mukta Singh Parihar; Abhinav Kranti (ISQED, 2014)

Performance Optimization and Parameter Sensitivity Analysis of Ultra Low Power Junctionless MOSFETs. - Mukta Singh Parihar; Abhinav Kranti (VLSID, 2014)

Back-gate effects and detailed characterization of junctionless transistor. - Mukta Singh Parihar; Fanyu Liu; Carlos Navarro; Sylvain Barraud; Maryline Bawedin; Irina Ionica; Abhinav Kranti; Sorin Cristoloveanu (ESSDERC, 2015)

Carrier lifetime evaluation in FD-SOI layers. - Kyung Hwa Lee; Maryline Bawedin; Hyungjin Park; Mukta Singh Parihar; Sorin Cristoloveanu (ESSDERC, 2017)