Study of Area Scaling Effect on Integrated Circuit Reliability Based on Yield Models. - Changsoo Hong; Linda S. Milor; Munkang Choi; Tom Lin (Microelectron. Reliab., 2005)

Impact on circuit performance of deterministic within-die variation in nanoscale semiconductor manufacturing. - Munkang Choi; Linda S. Milor (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Modeling of Deterministic Within-Die Variation in Timing Analysis, Leakage current Analysis, and Delay Fault Diagnosis. - Munkang Choi (2007)

Diagnosis of Optical Lithography Faults With Product Test Sets. - Munkang Choi; Linda S. Milor (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Exploring Power Savings of Gate-All-Around Cryogenic Technology. - Victor Moroz; Alexei Svizhenko; Munkang Choi; Plamen Asenov; Jaehyun Lee (VLSI Technology and Circuits, 2023)

A Comprehensive Study of Read-After-Write-Delay for Ferroelectric VNAND. - Ilho Myeong; Suhwan Lim; Taeyoung Kim; Sanghyun Park; Suseong Noh; Seung Min Lee; Jongho Woo; Hanseung Ko; Youngji Noh; Munkang Choi; Kiheun Lee; Sangwoo Han; et al. (IRPS, 2024)