CRISP: A Template for Reconfigurable Instruction Set Processors. - Pieter Op de Beeck; Francisco Barat; Murali Jayapala; Rudy Lauwereins (FPL, 2001)

A Low Energy Clustered Instruction Memory Hierarchy for Long Instruction Word Processors. - Murali Jayapala; Francisco Barat; Pieter Op de Beeck; Francky Catthoor; Geert Deconinck; Henk Corporaal (PATMOS, 2002)

Software Pipelining for Coarse-Grained Reconfigurable Instruction Set Processors. - Francisco Barat; Murali Jayapala; Pieter Op de Beeck; Geert Deconinck (ASP-DAC/VLSI Design, 2002)

Matador: An Exploration Environment for System-Design. - Paul Marchal; Murali Jayapala; Samuel Xavier de Souza; Peng Yang; Francky Catthoor; Geert Deconinck (J. Circuits Syst. Comput., 2002)

Low Power Coarse-Grained Reconfigurable Instruction Set Processor. - Francisco Barat; Murali Jayapala; Tom Vander Aa; Rudy Lauwereins; Geert Deconinck; Henk Corporaal (FPL, 2003)

Instruction buffering exploration for low energy VLIWs with instruction clusters. - Tom Vander Aa; Murali Jayapala; Francisco Barat; Geert Deconinck; Rudy Lauwereins; Francky Catthoor; Henk Corporaal (ASP-DAC, 2004)

L0 Cluster Synthesis and Operation Shuffling. - Murali Jayapala; Tom Vander Aa; Francisco Barat; Francky Catthoor; Henk Corporaal; Geert Deconinck (PATMOS, 2004)

Design Style Case Study for Embedded Multi Media Compute Nodes. - Andy Lambrechts; Tom Vander Aa; Murali Jayapala; Guillermo Talavera; Anthony Leroy; Adelina Shickova; Francisco Barat; Bingfeng Mei; Francky Catthoor; Diederik Verkest; Geert Deconinck; Henk Corporaal; et al. (RTSS, 2004)

L0 buffer energy optimization through scheduling and exploration. - Murali Jayapala; Tom Vander Aa; Francisco Barat; Geert Deconinck; Francky Catthoor; Henk Corporaal (SAC, 2004)

Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application. - Andy Lambrechts; Praveen Raghavan; Anthony Leroy; Guillermo Talavera; Tom Vander Aa; Murali Jayapala; Francky Catthoor; Diederik Verkest; Geert Deconinck; Henk Corporaal; Frédéric Robert; Jordi Carrabina (ASAP, 2005)

Operation Shuffling for Low Energy L0 Cluster Generation on Heterogeneous VLIW Processors. - Yuki Kobayashi; Murali Jayapala; Praveen Raghavan; Francky Catthoor; Masaharu Imai (ESTIMedia, 2005)

Instruction buffering exploration for low energy embedded processors. - Tom Vander Aa; Murali Jayapala; Francisco Barat; Geert Deconinck; Rudy Lauwereins; Henk Corporaal; Francky Catthoor (J. Embed. Comput., 2005)

Clustered Loop Buffer Organization for Low Energy VLIW Embedded Processors. - Murali Jayapala; Francisco Barat; Tom Vander Aa; Francky Catthoor; Henk Corporaal; Geert Deconinck (IEEE Trans. Computers, 2005)

Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors. - Praveen Raghavan; Andy Lambrechts; Murali Jayapala; Francky Catthoor; Diederik Verkest (DATE, 2006)

Instruction Transfer And Storage Exploration for Low Energy VLIWs. - Tom Vander Aa; Murali Jayapala; Henk Corporaal; Francky Catthoor; Geert Deconinck (SiPS, 2006)

A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors. - Praveen Raghavan; Satyakiran Munaga; Estela Rey Ramos; Andy Lambrechts; Murali Jayapala; Francky Catthoor; Diederik Verkest (ARCS, 2007)

Locality optimization in wireless applications. - Javed Absar; Min Li 001; Praveen Raghavan; Andy Lambrechts; Murali Jayapala; Arnout Vandecappelle; Francky Catthoor (CODES+ISSS, 2007)

Very wide register: an asymmetric register file organization for low power embedded processors. - Praveen Raghavan; Andy Lambrechts; Murali Jayapala; Francky Catthoor; Diederik Verkest; Henk Corporaal (DATE, 2007)

Architectures and Circuits for Software-Defined Radios: Scaling and Scalability for Low Cost and Low Energy. - Liesbet Van der Perre; Bruno Bougard; Jan Craninckx; Wim Dehaene; Lieven Hollevoet; Murali Jayapala; Pol Marchal; Miguel Miranda; Praveen Raghavan; Thomas Schuster; Piet Wambacq; Francky Catthoor; et al. (ISSCC, 2007)

Semi Custom Design: A Case Study on SIMD Shufflers. - Praveen Raghavan; Nandhavel Sethubalasubramanian; Satyakiran Munaga; Estela Rey Ramos; Murali Jayapala; Oliver Weiss; Francky Catthoor; Diederik Verkest (PATMOS, 2007)

Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors. - Yuki Kobayashi; Murali Jayapala; Praveen Raghavan; Francky Catthoor; Masaharu Imai (ACM Trans. Design Autom. Electr. Syst., 2007)

Operation shuffling over cycle boundaries for low energy L0 clustering. - Yuki Kobayashi; Murali Jayapala; Praveen Raghavan; Francky Catthoor; Masaharu Imai (ASAP, 2008)

Coffee: COmpiler Framework for Energy-Aware Exploration. - Praveen Raghavan; Andy Lambrechts; Javed Absar; Murali Jayapala; Francky Catthoor; Diederik Verkest (HiPEAC, 2008)

Energy-Aware Interconnect Optimization for a Coarse Grained Reconfigurable Processor. - Andy Lambrechts; Praveen Raghavan; Murali Jayapala; Francky Catthoor; Diederik Verkest (VLSI Design, 2008)

Efficient Method to Generate an Energy Efficient Schedule Using Operation Shuffling. - Yuki Kobayashi; Murali Jayapala; Praveen Raghavan; Francky Catthoor; Masaharu Imai (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008)

Address Generation Optimization for Embedded High-Performance Processors: A Survey. - Guillermo Talavera; Murali Jayapala; Jordi Carrabina; Francky Catthoor (J. Signal Process. Syst., 2008)

Systematic architecture exploration based on optimistic cycle estimation for low energy embedded processors. - Ittetsu Taniguchi; Murali Jayapala; Praveen Raghavan; Francky Catthoor; Keishi Sakanushi; Yoshinori Takeuchi; Masaharu Imai (ASP-DAC, 2009)

Compilation Technique for Loop Overhead Minimization. - Nikolas Kroupis; Praveen Raghavan; Murali Jayapala; Francky Catthoor; Dimitrios Soudris (DSD, 2009)

Locality optimization in a compiler for wireless applications. - Javed Absar; Praveen Raghavan; Andy Lambrechts; Min Li 001; Murali Jayapala; Francky Catthoor (Des. Autom. Embed. Syst., 2009)

Reconfigurable AGU: An Address Generation Unit Based on Address Calculation Pattern for Low Energy and High Performance Embedded Processors. - Ittetsu Taniguchi; Praveen Raghavan; Murali Jayapala; Francky Catthoor; Yoshinori Takeuchi; Masaharu Imai (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

EMPIRE: Empirical power/area/timing models for register files. - Praveen Raghavan; Andy Lambrechts; Murali Jayapala; Francky Catthoor; Diederik Verkest (Microprocess. Microsystems, 2009)

Distributed Loop Controller for Multithreading in Unithreaded ILP Architectures. - Praveen Raghavan; Andy Lambrechts; Murali Jayapala; Francky Catthoor; Diederik Verkest (IEEE Trans. Computers, 2009)

Playing the trade-off game: Architecture exploration using Coffeee. - Praveen Raghavan; Murali Jayapala; Andy Lambrechts; Javed Absar; Francky Catthoor (ACM Trans. Design Autom. Electr. Syst., 2009)

Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures. - Andy Lambrechts; Praveen Raghavan; Murali Jayapala; Bingfeng Mei; Francky Catthoor; Diederik Verkest (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Automated architecture exploration for low energy reconfigurable AGU. - Ittetsu Taniguchi; Murali Jayapala; Praveen Raghavan; Francky Catthoor; Keishi Sakanushi; Yoshinori Takeuchi; Masaharu Imai (ISOCC, 2011)

Characterization of VNIR Hyperspectral Sensors with Monolithically Integrated Optical Filters. - Prashant Agrawal; Klaas Tack; Bert Geelen; Bart Masschelein; Pablo Mateo Aranda Moran; Andy Lambrechts; Murali Jayapala (IMSE, 2016)

Non-negative Matrix Completion for the Enhancement of Snapshot Mosaic Multispectral Imagery. - Grigorios Tsagkatakis; Murali Jayapala; Bert Geelen; Panagiotis Tsakalides (IMSE, 2016)

Graph and Rank Regularized Matrix Recovery for Snapshot Spectral Image Demosaicing. - Grigorios Tsagkatakis; Maarten Bloemen; Bert Geelen; Murali Jayapala; Panagiotis Tsakalides (IEEE Trans. Computational Imaging, 2019)

Band Relevance Study of SWIR Hyperspectral Imaging for Material Recycling and Reuse. - Carolina Blanch Perez del Notario; Steven Thijs; Murali Jayapala (WHISPERS, 2023)

Drone-Based Corrosion Detection on High-Voltage Transmission Towers Using Hyperspectral Imaging. - Michiel Vlaminck; Zakaria Bnoulkacem; Gonzalo Luzardo; Hamed Zivariadab; Zohreh Zahiri; Bikram Koirala; Frédéric Mangialetto; Irid Bufi; Ljiljana Platisa; Murali Jayapala; Paul Scheunders; Hiep Luong 001 (WHISPERS, 2023)

Intra-operative Brain Tumor Detection with Deep Learning-Optimized Hyperspectral Imaging. - Tommaso Giannantonio; Anna Alperovich; Piercosimo Semeraro; Manfredo Atzori; Xiaohan Zhang; Christoph Hauger; Alexander Freytag; Siri Luthman; Roeland Vandebriel; Murali Jayapala; Lien Solie; Steven De Vleeschouwer (CoRR, 2023)

Multispectral Snapshot Microscopy as an Exposure Assessment Tool. - Carolina Blanch Perez del Notario; Amir Asadollahi; Pieter Bertier; Murali Jayapala (WHISPERS, 2024)

Microplastic Discrimination with Hyperspectral Microscopy. - Carolina Blanch Perez del Notario; Aala Azari; Murali Jayapala; Andy Lambrechts (WHISPERS, 2024)