Design of OFET-based differential amplifier with cascaded diode-connected load. - Mustafa Fayez; Khaled Mohamed Morsi; Mohammed Nabil Sabry (ICM, 2016)

OTFTs compact models: analysis, comparison, and insights. - Mustafa Fayez; Khaled Mohamed Morsi; Mohammed Nabil Sabry (IET Circuits Devices Syst., 2017)

Digital and Analog-Mixed-Signal In-Memory Processing in CMOS SRAM. - Akhilesh Jaiswal 001; Amogh Agrawal; Indranil Chakraborty; Mustafa Fayez Ali; Kaushik Roy 001 (ACM Great Lakes Symposium on VLSI, 2019)

In-Memory Computing in Emerging Memory Technologies for Machine Learning: An Overview. - Kaushik Roy 001; Indranil Chakraborty; Mustafa Fayez Ali; Aayush Ankit; Amogh Agrawal (DAC, 2020)

GENIEx: A Generalized Approach to Emulating Non-Ideality in Memristive Xbars using Neural Networks. - Indranil Chakraborty; Mustafa Fayez Ali; Dong Eun Kim; Aayush Ankit; Kaushik Roy 001 (DAC, 2020)

RAMANN: in-SRAM differentiable memory computations for memory-augmented neural networks. - Mustafa Fayez Ali; Amogh Agrawal; Kaushik Roy 001 (ISLPED, 2020)

IMAC: In-memory multi-bit Multiplication andACcumulation in 6T SRAM Array. - Mustafa Fayez Ali; Akhilesh Jaiswal 001; Sangamesh Kodge; Amogh Agrawal; Indranil Chakraborty; Kaushik Roy 001 (CoRR, 2020)

Circuits and Architectures for In-Memory Computing-Based Machine Learning Accelerators. - Aayush Ankit; Indranil Chakraborty; Amogh Agrawal; Mustafa Fayez Ali; Kaushik Roy 001 (IEEE Micro, 2020)

Resistive Crossbars as Approximate Hardware Building Blocks for Machine Learning: Opportunities and Challenges. - Indranil Chakraborty; Mustafa Fayez Ali; Aayush Ankit; Shubham Jain; Sourjya Roy; Shrihari Sridharan; Amogh Agrawal; Anand Raghunathan; Kaushik Roy 001 (Proc. IEEE, 2020)

Dynamic Read Current Sensing With Amplified Bit-Line Voltage for STT-MRAMs. - Mustafa Fayez Ali; Robert Andrawis; Kaushik Roy 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

IMAC: In-Memory Multi-Bit Multiplication and ACcumulation in 6T SRAM Array. - Mustafa Fayez Ali; Akhilesh Jaiswal 001; Sangamesh Kodge; Amogh Agrawal; Indranil Chakraborty; Kaushik Roy 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

In-Memory Low-Cost Bit-Serial Addition Using Commodity DRAM Technology. - Mustafa Fayez Ali; Akhilesh Jaiswal 001; Kaushik Roy 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

i-SRAM: Interleaved Wordlines for Vector Boolean Operations Using SRAMs. - Akhilesh Jaiswal 001; Amogh Agrawal; Mustafa Fayez Ali; Saima Sharmin; Kaushik Roy 001 (IEEE Trans. Circuits Syst., 2020)

Design Tools for Resistive Crossbar based Machine Learning Accelerators. - Indranil Chakraborty; Sourjya Roy; Shrihari Sridharan; Mustafa Fayez Ali; Aayush Ankit; Shubham Jain; Anand Raghunathan (AICAS, 2021)

IMPULSE: A 65nm Digital Compute-in-Memory Macro with Fused Weights and Membrane Potential for Spike-based Sequential Learning Tasks. - Amogh Agrawal; Mustafa Fayez Ali; Minsuk Koo; Nitin Rathi; Akhilesh Jaiswal 001; Kaushik Roy 001 (CoRR, 2021)

PIM-DRAM: Accelerating Machine Learning Workloads Using Processing in Commodity DRAM. - Sourjya Roy; Mustafa Fayez Ali; Anand Raghunathan (IEEE J. Emerg. Sel. Topics Circuits Syst., 2021)

LNS-Madam: Low-Precision Training in Logarithmic Number System Using Multiplicative Weight Update. - Jiawei Zhao; Steve Dai; Rangharajan Venkatesan; Brian Zimmer; Mustafa Fayez Ali; Ming-Yu Liu 001; Brucek Khailany; William J. Dally; Anima Anandkumar (IEEE Trans. Computers, 2022)

Compute-in-Memory Technologies and Architectures for Deep Learning Workloads. - Mustafa Fayez Ali; Sourjya Roy; Utkarsh Saxena; Tanvi Sharma; Anand Raghunathan; Kaushik Roy 001 (IEEE Trans. Very Large Scale Integr. Syst., 2022)

A 65 nm 1.4-6.7 TOPS/W Adaptive-SNR Sparsity-Aware CIM Core with Load Balancing Support for DL workloads. - Mustafa Fayez Ali; Indranil Chakraborty; Sakshi Choudhary; Muya Chang; Dong Eun Kim; Arijit Raychowdhury; Kaushik Roy 001 (CICC, 2023)

WWW: What, When, Where to Compute-in-Memory. - Tanvi Sharma; Mustafa Fayez Ali; Indranil Chakraborty; Kaushik Roy 001 (CoRR, 2023)

Evaluating Compute in Memory Architectures for Matrix Multiplication: A Dataflow-Centric Perspective. - Tanvi Sharma; Indranil Chakraborty; Mustafa Fayez Ali; Kaushik Roy 001 (ISPASS, 2025)