On the realization of n-scroll attractors. - Müstak E. Yalçin; Johan A. K. Suykens; Joos Vandewalle (ISCAS (5), 1999)

Master-Slave Synchronization of Lur'e Systems with Time-Delay. - Müstak E. Yalçin; Johan A. K. Suykens; Joos Vandewalle (Int. J. Bifurc. Chaos, 2001)

Families of scroll Grid attractors. - Müstak E. Yalçin; Johan A. K. Suykens; Joos Vandewalle; Serdar Özoguz (Int. J. Bifurc. Chaos, 2002)

Coupled chaotic simulated annealing processes. - Johan A. K. Suykens; Müstak E. Yalçin; Joos Vandewalle (ISCAS (3), 2003)

Steady-State Analysis of Nonlinearly Coupled Chua's Circuits with Periodic Input. - F. Acar Savaci; Müstak E. Yalçin; Cüneyt Güzelis (Int. J. Bifurc. Chaos, 2003)

A double scroll based true random bit generator. - Müstak E. Yalçin; Johan A. K. Suykens; Joos Vandewalle (ISCAS (4), 2004)

Watermarking on CNN-UM for image and video authentication. - Müstak E. Yalçin; Joos Vandewalle; Paolo Arena; Adriano Basile; Luigi Fortuna (Int. J. Circuit Theory Appl., 2004)

Toward CNN chip-specific robustness. - Samuel Xavier de Souza; Müstak E. Yalçin; Johan A. K. Suykens; Joos Vandewalle (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

True random bit generation from a double-scroll attractor. - Müstak E. Yalçin; Johan A. K. Suykens; Joos Vandewalle (IEEE Trans. Circuits Syst. I Regul. Pap., 2004)

Spatiotemporal pattern formation in the ACE16k CNN chip. - Müstak E. Yalçin; Johan A. K. Suykens; Joos Vandewalle (ISCAS (6), 2005)

Multi-scroll and hypercube attractors from Josephson junctions. - Müstak E. Yalçin; Johan A. K. Suykens; Joos Vandewalle (ISCAS, 2006)

Spatiotemporal Pattern Formation on the ACE16K CNN Chip. - Müstak E. Yalçin; Johan A. K. Suykens (Int. J. Bifurc. Chaos, 2006)

Increasing the Entropy of a Random Number Generator Using n-scroll Chaotic attractors. - Müstak E. Yalçin (Int. J. Bifurc. Chaos, 2007)

Synchronization of first-order time-delay systems generating n-scroll chaotic attractors. - Selçuk Kilinç; Müstak E. Yalçin; Serdar Özoguz (ISCAS, 2008)

An emulated digital wave computer core implementation. - Ramazan Yeniceri; Müstak E. Yalçin (ECCTD, 2009)

Multiscroll Chaotic attractors from a Hysteresis Based Time-Delay Differential equation. - Selçuk Kilinç; Müstak E. Yalçin; Serdar Özoguz (Int. J. Bifurc. Chaos, 2010)

Randomly reconfigurable Cellular Neural Network. - Tuba Ayhan; Müstak Erhan Yalçin (ECCTD, 2011)

An active wave computing based path finding approach for 3-D environment. - Volkan Kilic; Müstak E. Yalçin (ISCAS, 2011)

Implementation of a cellular neural network-based segmentation algorithm on the bio-inspired vision system. - Fethullah Karabiber; Giuseppe Grassi; Pietro Vecchio; Sabri Arik; Müstak Erhan Yalçin (J. Electronic Imaging, 2011)

Hybrid processor population for odor processing. - Tuba Ayhan; Ramazan Yeniceri; Selman Ergunay; Müstak Erhan Yalçin (ISCAS, 2012)

An Application of Small-World Cellular Neural Networks on Odor Classification. - Tuba Ayhan; Müstak Erhan Yalçin (Int. J. Bifurc. Chaos, 2012)

A parallelized distance transformation architecture for FPGAs. - Melike Atay; Müstak E. Yalçin (ECCTD, 2013)

Realization of preprocessing blocks of CNN based CASA system on FPGA. - O. Levent Savkay; Nerhun Yildiz; Evren Cesur; Müstak E. Yalçin; Vedat Tavsanoglu (ECCTD, 2013)

Throughput enhancement for a new time-delay sampled-data system based True Random Bit Generator. - Ramazan Yeniceri; Buse Ustaoglu; Müstak E. Yalçin (ECCTD, 2013)

The Doppler Effect with input driven autowaves. - Ramazan Yeniceri; Müstak E. Yalçin (ECCTD, 2013)

Realization of processing blocks of CNN based CASA system on CPU and FPGA. - O. Levent Savkay; Evren Cesur; Nerhun Yildiz; Müstak E. Yalçin; Vedat Tavsanoglu (ISCAS, 2014)

Digital design of skeletonization. - Melike Atay; Müstak E. Yalçin (SIU, 2014)

A Chaotic Time-Delay Sampled-Data System and Its Implementation. - Müstak E. Yalçin; Ramazan Yeniceri; Serdar Özoguz (Int. J. Bifurc. Chaos, 2014)

Cellular network of networks on dynamically partial reconfigurable FPGA. - Emrah Abtioglu; Ramazan Yeniceri; Müstak E. Yalçin (ECCTD, 2015)

Wave computer core using fixed-point arithmetic. - Baris Karakaya; Ramazan Yeniceri; Müstak E. Yalçin (ISCAS, 2015)

Key generation and license authentication using physical unclonable functions. - Sahin Bas; Müstak E. Yalçin (SIU, 2015)

Computer assisted sperm analysis system designed on a hybrid CPU + FPGA architecture. - Osman Levent Savkay; Vedat Tavsanoglu; Müstak Erhan Yalçin; Evren Cesur (SIU, 2015)

Attack on a Chaos-Based Random Number Generator Using Anticipating Synchronization. - Ramazan Yeniçeri; Selçuk Kilinç; Müstak E. Yalçin (Int. J. Bifurc. Chaos, 2015)

Asynchronous delay doubler and binary low-pass filter for a time-delay chaotic circuit. - Ramazan Yeniçeri; Müstak E. Yalçin (Int. J. Circuit Theory Appl., 2016)

Multi-scroll chaotic attractors from a generalized time-delay sampled-data system. - Ramazan Yeniçeri; Müstak E. Yalçin (Int. J. Circuit Theory Appl., 2016)

Realization of elementary cellular automata with random minimal memory. - Emre Goncu; Müstak E. Yalçin (ECCTD, 2017)

Emulating CNN with template learning on FPGA. - Erdem Köse; Müstak E. Yalçin (ECCTD, 2017)

A chaotic time-delay system based digital RNG and integrated autonomous test suite. - Ramazan Yeniceri; Alptekin Vardar; Erdem Cil; Latif Akcay; Emre Goncu; Müstak E. Yalçin (ECCTD, 2017)

Full digital implementation of a chaotic time-delay sampled-data system. - Ramazan Yeniceri; Alptekin Vardar; Müstak E. Yalçin (ISCAS, 2017)

Partially Reconfigurable IP Protection System with Ring Oscillator Based Physically Unclonable Functions. - Emrah Abtioglu; Ramazan Yeniceri; Burak Govem; Emre Goncu; Müstak E. Yalçin; Gökay Saldamli (NGCAS, 2017)

Cellular Automata with Random Memory and Its Implementations. - Emre Goncu; Müstak E. Yalçin (Int. J. Bifurc. Chaos, 2017)

A High Speed True Random Number Generator with Cellular Automata with Random Memory. - Emre Göncü; Abdulkadir Koçdogan; Müstak E. Yalçin (ISCAS, 2018)

Design of a pedestrian dead-reckoning system and comparison of methods on the system. - Ozan Vahit Altinpinar; Müstak Erhan Yalçin (SIU, 2018)

Design of an UWB-based indoor positioning system. - Turan Can Artunc; Müstak Erhan Yalçin (SIU, 2018)

A Hardware Accelerated Packet Classifier Design for A Network Router. - Oguzhan Çik; Müstak Erhan Yalçin (SIU, 2020)

GEZSAN - Real Time Spectrum Analyzer. - B. Hakan Sezgin; Mustafa Direk; Mert Külte; Mehmet Eskin; M. Esat Sudaduran; Emrah Abtioglu; Mustafa Tanis; Müstak E. Yalçin (SIU, 2020)

Chaos Synchronization of Fractional-Order Lur'e Systems. - Mohammed Salah Bouridah; Toufik Bouden; Müstak Erhan Yalçin (Int. J. Bifurc. Chaos, 2020)

A design of cellular automata-based PUF and its implementation on FPGA. - Emre Goncu; Müstak Erhan Yalçin (Int. J. Circuit Theory Appl., 2020)

A new family of 9D and 10D hyperchaotic systems from the 8D hyperchaotic Benkouider system, the bifurcation analysis of the 10D hyperchaotic system, circuit design and an application to secure voice communication. - Khaled Benkouider; Toufik Bouden; Sundarapandian Vaidyanathan; Müstak E. Yalçin (Int. J. Model. Identif. Control., 2020)

A new family of 5D, 6D, 7D and 8D hyperchaotic systems from the 4D hyperchaotic Vaidyanathan system, the dynamic analysis of the 8D hyperchaotic system with six positive Lyapunov exponents and an application to secure communication design. - Khaled Benkouider; Toufik Bouden; Müstak E. Yalçin; Sundarapandian Vaidyanathan (Int. J. Model. Identif. Control., 2020)

Delayed outputs fractional-order hyperchaotic systems synchronization for images encryption. - Mohammed Salah Bouridah; Toufik Bouden; Müstak E. Yalçin (Multim. Tools Appl., 2021)

The deep multichannel discrete-time cellular neural network model for classification. - Emrah Abtioglu; Müstak Erhan Yalçin (Int. J. Circuit Theory Appl., 2022)

Optimization of the Eigenvalue Decomposition of Floating-Point Matrices on the TMS320C6672 Digital Signal Processor. - Okan Çalis; Müstak Erhan Yalçin (ICECS, 2023)

An Open-Source eFPGA-based SoC Design for Computation Acceleration. - Yunus Emre Eryilmaz; Hasan Erdem Yantir; Müstak E. Yalçin (ICECS, 2023)

FPGA-Based Implementation of a Matched Filter for Acoustic Shooter Localization System. - Bilgehan Miraç Baki; Müstak E. Yalçin (SIU, 2023)

Single Event Upset Tolerant TRNG Design and Its Tests Under Radiation. - Özgür Ozan Yilmaz; Melahat Bilge Demirköz; Müstak Erhan Yalçin (DCIS, 2024)

Spoofed GPS L1 Carrier C/A Code Manipulation Attack. - Mustafa Tanis; Müstak Erhan Yalçin (SIU, 2024)

A novel S-box design based on quantum tent maps and fractional stochastic models with an application in image encryption. - Nafiseh Hematpour; Fatemeh Gharari; Berna Ors; Müstak E. Yalçin (Soft Comput., 2024)

A statistical method of GPS spoofing detection using power spectral density for hardware. - Mustafa Tanis; Müstak Erhan Yalçin (Int. J. Circuit Theory Appl., 2024)