Internal Power Dissipation Modeling and Minimization for Submicronic CMOS Design. - Philippe Maurine; Mustapha Rezzoug; Daniel Auvergne (PATMOS, 2000)

Second Generation Delay Model for Submicron CMOS Process. - Mustapha Rezzoug; Philippe Maurine; Daniel Auvergne (PATMOS, 2000)

Output transition time modeling of CMOS structures. - Philippe Maurine; Mustapha Rezzoug; Daniel Auvergne (ISCAS (5), 2001)

Transition time modeling in deep submicron CMOS. - Philippe Maurine; Mustapha Rezzoug; Nadine Azémard; Daniel Auvergne (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)