AC-and DC-powered subnanosecond 1-kbit Josephson cache memory design. - Yoshifusa Wada; Mutsuo Hidaka; Shuichi Nagasawa; Ichiro Ishida (IEEE J. Solid State Circuits, 1988)

570-ps 13-mW Josephson 1-kbit NDRO RAM. - Shuichi Nagasawa; Yoshifusa Wada; Mutsuo Hidaka; Hisanao Tsuge; Iichiro Ishida; Shuichi Tahara (IEEE J. Solid State Circuits, 1989)

Superconductive Single-Flux-Quantum Circuit/System Technology and 40Gb/s Switch System Demonstration. - Yoshihito Hashimoto; Shuichi Nagasawa; Tetsuro Satoh; Kenji Hinode; Hideo Suzuki; Toshiyuki Miyazaki; Mutsuo Hidaka; Nobuyuki Yoshikawa; Hirotaka Terai; Akira Fujimaki (ISSCC, 2008)

Applying Low Power Consumption Superconductive Device Technology to Real-Time Waveform Monitoring for Photonic Network. - Mutsuo Hidaka; Michitaka Maruyama; Hideo Suzuki (SAINT, 2008)

Improvements in Fabrication Process for Nb-Based Single Flux Quantum Circuits in Japan. - Mutsuo Hidaka; Shuichi Nagasawa; Kenji Hinode; Tetsuro Satoh (IEICE Trans. Electron., 2008)

100 GHz Demonstrations Based on the Single-Flux-Quantum Cell Library for the 10 kA/cm2 Nb Multi-Layer Process. - Yuki Yamanashi; Toshiki Kainuma; Nobuyuki Yoshikawa; Irina Kataeva; Hiroyuki Akaike; Akira Fujimaki; Masamitsu Tanaka; Naofumi Takagi; Shuichi Nagasawa; Mutsuo Hidaka (IEICE Trans. Electron., 2010)

Foreword. - Mutsuo Hidaka (IEICE Trans. Electron., 2012)

Nb 9-Layer Fabrication Process for Superconducting Large-Scale SFQ Circuits and Its Process Evaluation. - Shuichi Nagasawa; Kenji Hinode; Tetsuro Satoh; Mutsuo Hidaka; Hiroyuki Akaike; Akira Fujimaki; Nobuyuki Yoshikawa; Kazuyoshi Takagi; Naofumi Takagi (IEICE Trans. Electron., 2014)

Design and High-Speed Demonstration of Single-Flux-Quantum Bit-Serial Floating-Point Multipliers Using a 10kA/cm2 Nb Process. - Xizhu Peng; Yuki Yamanashi; Nobuyuki Yoshikawa; Akira Fujimaki; Naofumi Takagi; Kazuyoshi Takagi; Mutsuo Hidaka (IEICE Trans. Electron., 2014)

Fabrication Process for Superconducting Digital Circuits. - Mutsuo Hidaka; Shuichi Nagasawa (IEICE Trans. Electron., 2021)

Planarized Nb 4-Layer Fabrication Process for Superconducting Integrated Circuits and Its Fabricated Device Evaluation. - Shuichi Nagasawa; Masamitsu Tanaka; Naoki Takeuchi; Yuki Yamanashi; Shigeyuki Miyajima; Fumihiro China; Taiki Yamae; Koki Yamazaki; Yuta Somei; Naonori Sega; Yoshinao Mizugaki; Hiroaki Myoren; et al. (IEICE Trans. Electron., 2021)