Fast and accurate event-driven simulation of mixed-signal systems with data supplementation. - Myeong-Jae Park; Hanseok Kim; Minbok Lee; Jaeha Kim (CICC, 2011)

True event-driven simulation of analog/mixed-signal behaviors in SystemVerilog: A decision-feedback equalizing (DFE) receiver example. - Ji-Eun Jang; Myeong-Jae Park; Dongyun Lee; Jaeha Kim (CICC, 2012)

A 5-Gbps 1.7 pJ/bit ditherless CDR with optimal phase interval detection. - Myeong-Jae Park; Hanseok Kim; Seuk Son; Jaeha Kim (CICC, 2012)

An event-driven simulation methodology for integrated switching power supplies in SystemVerilog. - Ji-Eun Jang; Myeong-Jae Park; Jaeha Kim (DAC, 2013)

A 2.3-mW, 5-Gb/s Low-Power Decision-Feedback Equalizer Receiver Front-End and its Two-Step, Minimum Bit-Error-Rate Adaptation Algorithm. - Seuk Son; Hanseok Kim; Myeong-Jae Park; Kyung-Hoon Kim; E-Hung Chen; Brian S. Leibowitz; Jaeha Kim (IEEE J. Solid State Circuits, 2013)

Pseudo-Linear Analysis of Bang-Bang Controlled Timing Circuits. - Myeong-Jae Park; Jaeha Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

A built-in self-test circuit for jitter tolerance measurement in high-speed wireline receivers. - Myeong-Jae Park; Jaeha Kim (ITC, 2014)

A 4×40 Gb/s quad-lane CDR with shared frequency tracking and data dependent jitter filtering. - Masum Hossain; E-Hung Chen; Reza Navid; Brian S. Leibowitz; Chuen-Huei Adam Chou; Simon Li; Myeong-Jae Park; Jihong Ren; Barry Daly; Bruce Su; Makarand Shirasgaonkar; Fred Heaton; et al. (VLSIC, 2014)

A 2.5-V, 160-μJ-output piezoelectric energy harvester and power management IC for batteryless wireless switch (BWS) applications. - Joonseok Yang; Minbok Lee; Myeong-Jae Park; Sung-Youb Jung; Jaeha Kim (VLSIC, 2015)

Time slot optimization algorithm for multisource energy harvesting systems. - Sung-Youb Jung; Myeong-Jae Park; Minbok Lee; Joonseok Yang; Jaeha Kim (ESSCIRC, 2016)

A 1.2V 64Gb 341GB/S HBM2 stacked DRAM with spiral point-to-point TSV structure and improved bank group data control. - Jin-Hee Cho; Jihwan Kim; Wooyoung Lee; Dong-Uk Lee; Tae-Kyun Kim 002; Heat Bit Park; Chunseok Jeong; Myeong-Jae Park; Seung Geun Baek; Seokwoo Choi; Byung Kuk Yoon; Young Jae Choi; et al. (ISSCC, 2018)

Design and Analysis of Energy-Efficient Single-Pulse Piezoelectric Energy Harvester and Power Management IC for Battery-Free Wireless Remote Switch Applications. - Minbok Lee; Joonseok Yang; Myeong-Jae Park; Sung-Youb Jung; Jaeha Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

22.3 A 128Gb 8-High 512GB/s HBM2E DRAM with a Pseudo Quarter Bank Structure, Power Dispersion and an Instruction-Based At-Speed PMBIST. - Dong-Uk Lee; Ho Sung Cho; Jihwan Kim; Young Jun Ku; Sangmuk Oh; Chul Dae Kim; Hyun Woo Kim; Wooyoung Lee; Tae-Kyun Kim 001; Tae Sik Yun; Min Jeong Kim; SeungGyeon Lim; et al. (ISSCC, 2020)

A 192-Gb 12-High 896-GB/s HBM3 DRAM with a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization. - Myeong-Jae Park; Ho Sung Cho; Tae-Sik Yun; Sangjin Byeon; Young Jun Koo; Sang-Sic Yoon; Dong-Uk Lee; Seokwoo Choi; Ji Hwan Park; Jinhyung Lee; Kyungjun Cho; Junil Moon; et al. (ISSCC, 2022)

A 192-Gb 12-High 896-GB/s HBM3 DRAM With a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization. - Myeong-Jae Park; Jinhyung Lee; Kyungjun Cho; Ji Hwan Park; Junil Moon; Sung-Hak Lee; Tae-Kyun Kim 001; Sanghoon Oh; Seokwoo Choi; Yongsuk Choi; Ho Sung Cho; Tae-Sik Yun; et al. (IEEE J. Solid State Circuits, 2023)

Present and Future, Challenges of High Bandwith Memory (HBM). - Kwiwook Kim; Myeong-Jae Park (IMW, 2024)

13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area Optimization. - Jinhyung Lee; Kyungjun Cho; Chang Kwon Lee; Yeonho Lee 002; Jae-Hyung Park; Su-Hyun Oh; Yucheon Ju; Chunseok Jeong; Ho Sung Cho; Jaeseung Lee; Tae-Sik Yun; Jin Hee Cho; et al. (ISSCC, 2024)

Analog Circuit Design Automation via Sequential RL Agents and Gm/ID Methodology. - Sungweon Hong; Yunseob Tae; Dongjun Lee; Gijin Park; Jaemyung Lim; Kyungjun Cho; Chunseok Jeong; Myeong-Jae Park; Songnam Hong 001; Jaeduk Han (IEEE Access, 2024)