Neuromorphic Hardware System for Visual Pattern Recognition With Memristor Array and CMOS Neuron. - Myonglae Chu; Byoungho Kim; Sangsu Park; Hyunsang Hwang; Moongu Jeon; Byoung Hun Lee; Byung-Geun Lee (IEEE Trans. Ind. Electron., 2015)

A 10-bit 200-MS/s Zero-Crossing-Based Pipeline ADC in 0.13-µm CMOS Technology. - Myonglae Chu; Byoungho Kim; Byung-Geun Lee (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Stochastic implementation of the activation function for artificial neural networks. - Injune Yeo; Sang-Gyun Gi; Byung-Geun Lee; Myonglae Chu (BioCAS, 2016)

A Power and Area Efficient CMOS Stochastic Neuron for Neural Networks Employing Resistive Crossbar Array. - Injune Yeo; Myonglae Chu; Byung-Geun Lee (IEEE Trans. Biomed. Circuits Syst., 2019)

A Compressive Sensing CMOS Image Sensor With Partition Sampling Technique. - Hyunkeun Lee; Woo-Tae Kim; Jinho Kim; Myonglae Chu; Byung-Geun Lee (IEEE Trans. Ind. Electron., 2021)

Design and analysis on low-power and low-noise single slope ADC for digital pixel sensors. - Hyun-Yong Jung; Myonglae Chu; Min-Woong Seo; Suksan Kim; Jiyoun Song; Sanggwon Lee; Sung-Jae Byun; Minkyung Kim 010; Daehee Bae; Junan Lee; Sung-Yong Kim; Jongyeon Lee; et al. (Imaging Sensors and Systems, 2022)