Development of a permittivity extraction method for ultra low k dielectrics integrated in advanced interconnects. - Olga Cueto; Myriam Assous; François de Crecy; A. Toffoli; David Bouchu; M. Fayolle; Frédéric Boulanger (Microelectron. Reliab., 2007)

Modelling of Through Silicon Via RF performance and impact on signal transmission in 3D integrated circuits. - Lionel Cadix; Alexis Farcy; Cédric Bermond; Christine Fuchs; Patrick Leduc; Maxime Rousseau; Myriam Assous; Alexandre Valentian; Julie Roullard; Elie Eid; Nicolas Sillon; Bernard Fléchet; et al. (3DIC, 2009)

An innovative die to wafer 3D integration scheme: Die to wafer oxide or copper direct bonding with planarised oxide inter-die filling. - Léa Di Cioccio; Pierric Gueguen; Rachid Taibi; Thomas Signamarcheix; Laurent Bally; Laurent Vandroux; Marc Zussy; Sophie Verrun; Jérôme Dechamp; Patrick Leduc; Myriam Assous; David Bouchu; et al. (3DIC, 2009)

First integration of Cu TSV using die-to-wafer direct bonding and planarization. - Patrick Leduc; Myriam Assous; Léa Di Cioccio; Marc Zussy; Thomas Signamarcheix; Antonio Roman; Maxime Rousseau; Sophie Verrun; Laurent Bally; David Bouchu; Lionel Cadix; Alexis Farcy; et al. (3DIC, 2009)

A successful implementation of dual damascene architecture to copper TSV for 3D high density applications. - Rebha El Farhane; Myriam Assous; Patrick Leduc; Aurélie Thuaire; David Bouchu; Hélène Feldis; Nicolas Sillon (3DIC, 2010)

POPSTAR: a Robust Modular Optical NoC Architecture for Chiplet-based 3D Integrated Systems. - Yvain Thonnart; Stéphane Bernabé; Jean Charbonnier; Christian Bernard; David Coriat; César Fuguet Tortolero; Pierre Tissier; Benoît Charbonnier; Stéphane Malhouitre; Damien Saint-Patrice; Myriam Assous; Aditya Narayan; et al. (DATE, 2020)

Specificities of linear Si QD arrays integration and characterization. - Heimanu Niebojewski; Benoit Bertrand; Etienne Nowak; Thomas Bedecarrats; Bruna Cardoso Paz; Lauriane Contamin; Pierre-André Mortemousque; V. Labracherie; L. Brevard; H. Sahin; Jean Charbonnier; C. Thomas; et al. (VLSI Technology and Circuits, 2022)