The inadequacy of the stuck-at fault model for testing mos lsi circuits: a review of mos failure mechanisms and some implications for computer-aided design and test of mos lsi circuits. - N. Burgess; Robert I. Damper (Softw. Microsystems, 1984)

MOS Test Pattern Generation Using Path Algebras. - Robert I. Damper; N. Burgess (IEEE Trans. Computers, 1987)

A Fast Division Algorithm for VLSI. - N. Burgess (ICCD, 1991)

The Patricia testability analysis tool. - M. Hadjinicolaeu; N. Burgess; Donatella Sciuto; G. Buananno; Patrizia Cavalloro; Giuseppe Zaza (Microprocessing and Microprogramming, 1991)

Representations of Serial Order. - Richard N. A. Henson; N. Burgess (NCPW, 1997)

Implementing 1, 024-Bit RSA Exponentiation on a 32-Bit Processor Core. - B. J. Phillips; N. Burgess (ASAP, 2000)