Cache design for mixed criticality real-time systems. - N. G. Chetan Kumar; Sudhanshu Vyas; Ron K. Cytron; Christopher D. Gill; Joseph Zambreno; Phillip H. Jones (ICCD, 2014)

Hardware-software architecture for priority queue management in real-time and embedded systems. - N. G. Chetan Kumar; Sudhanshu Vyas; Ron K. Cytron; Christopher D. Gill; Joseph Zambreno; Phillip H. Jones (Int. J. Embed. Syst., 2014)