Survey on Efficient, Low-power, AES Image Encryption and Bio-cryptography Schemes. - S. Sridevi Sathya Priya; P. Karthigaikumar; N. M. Siva Mangai; P. T. Vanathi (Smart Comput. Rev., 2012)

Recognition of elephants in infrared images using clustering-based image segmentation. - N. M. Siva Mangai; Shilu Tresa Vinod; D. Abraham Chandy (Int. J. Electron. Secur. Digit. Forensics, 2015)

Efficient hardware implementation of AES algorithm using bio metric key. - S. Sridevi Sathya Priya; P. Karthigaikumar; N. M. Siva Mangai; R. Sandhya (Int. J. Inf. Commun. Technol., 2015)

PSP CO2: An Efficient Hardware Architecture for AES Algorithm for High Throughput. - P. Karthigaikumar; N. Anitha Christy; N. M. Siva Mangai (Wirel. Pers. Commun., 2015)

An Efficient Hardware Architecture for High Throughput AES Encryptor Using MUX Based Sub Pipelined S-Box. - S. Sridevi Sathya Priya; P. Karthigaikumar; N. M. Siva Mangai; P. Kirti Gaurav Das (Wirel. Pers. Commun., 2017)

High Throughput AES Algorithm Using Parallel Subbytes and MixColumn. - S. Sridevi Sathya Priya; P. Karthigaikumar; N. M. Siva Mangai; V. Rejula (Wirel. Pers. Commun., 2017)

Design and Physical Implementation of Array Signal Processor ASIC for Sector Imaging Systems. - Jayaraj U. Kidav; N. M. Sivamangai; Perumal M. Pillai; Sreejeesh S. G. (VLSID, 2019)

An Efficient Wavelet Based Transient Current Test towards Detection of Data Retention Faults in SRAM. - Princy P; N. M. Sivamangai (J. Electron. Test., 2019)

Architecture and FPGA prototype of cycle stealing DMA array signal processor for ultrasound sector imaging systems. - Jayaraj U. Kidav; N. M. Sivamangai; Perumal M. Pillai; S. Raja M (Microprocess. Microsystems, 2019)

Design of AWC core using DCD iterations for MVDR beamformer. - Jayaraj U. Kidav; N. M. Sivamangai; Perumal M. Pillai (Microprocess. Microsystems, 2020)

A broadband MVDR beamforming core for ultrasound imaging. - Jayaraj U. Kidav; N. M. Sivamangai; Perumal M. Pillai; Sreejeesh S. G. (Integr., 2021)

Hardware Obfuscation for IP Protection of DSP Applications. - Naveenkumar R; N. M. Sivamangai; Napolean A; G. Akashraj Nissi (J. Electron. Test., 2022)

Design and Evaluation of XOR Arbiter Physical Unclonable Function and its Implementation on FPGA in Hardware Security Applications. - Naveenkumar R; N. M. Sivamangai; Napolean A; S. Sridevi Sathya Priya (J. Electron. Test., 2022)

Design of INV/BUFF Logic Locking For Enhancing the Hardware Security. - Naveenkumar R; N. M. Sivamangai; Napolean A; S. Sridevi Sathya Priya; S. V. Ashika (J. Electron. Test., 2023)

Implementation of Efficient Security Algorithm. - A. Vinodhini; S. Sridevi Sathya Priya; P. Karthigaikumar; N. M. Siva Mangai (ICDCS, 2024)

Optimising energy consumption in Nano-cryptography: Quantum cellular automata-based multiplexer/demultiplexer design. - Aswathy N; N. M. Siva Mangai (IET Quantum Commun., 2024)

Hardware Trojans Detection and Prevention Techniques Review. - Naveenkumar R; N. M. Sivamangai (Wirel. Pers. Commun., 2024)