A Modified Genetic Algorithm for Evolution of Neural Network in Designing an Evolutionary Neuro-Hardware. - N. Mohankumar 003; B. Bhuvan; M. Nirmala Devi 001; S. Arumugam (GEM, 2008)

FPGA Realization of Activation Function for Artificial Neural Networks. - Venakata Saichand; M. Nirmala Devi 001; S. Arumugam; N. Mohankumar 003 (ISDA (3), 2008)

Malicious Circuit Detection for Improved Hardware Security. - R. Bharath; G. Arun Sabari; Dhinesh Ravi Krishna; Arun Prasathe; K. Harish; N. Mohankumar 003; M. Nirmala Devi 001 (SSCC, 2015)

Obviating Multiple Attacks with Enhanced Logic Locking. - Paul Anu; N. Mohankumar 003; M. Nirmala Devi 001 (IC3, 2022)