Hardware Virtual Components Compliant with Communication System Standards. - Nabil Abdelli; Pierre Bomel; Emmanuel Casseau; Anne-Marie Fouilliart; Christophe Jégo; Philippe Kajfasz; Bertrand Le Gal; Nathalie Le Heno (DSD, 2005)

High-Level Synthesis in Latency Insensitive System Methodology. - Pierre Bomel; Nabil Abdelli; Eric Martin 001; Anne-Marie Fouilliart; Emmanuel Boutillon; Philippe Kajfasz (DSD, 2005)

Power/Energy Estimation in SoCs by Multi-Level Parametric Modeling. - Nathalie Julien; Johann Laurent; Eric Senn; David Elléouet; Yannig Savary; Nabil Abdelli; Jalei Ktari (ReCoSoC, 2005)

DVB-DSNG Modem High Level Synthesis in an Optimized Latency Insensitive System Context. - Pierre Bomel; Nabil Abdelli; Eric Martin 001; Anne-Marie Fouilliart; Emmanuel Boutillon; Philippe Kajfasz (SAMOS, 2005)

Building and Using System, Algorithmic, and Architectural Power and Energy Models in the FPGA Design. - Eric Senn; Nathalie Julien; David Elléouet; Yannig Savary; Nabil Abdelli (ReCoSoC, 2006)