A low-power pseudo-dynamic full adder cell for image addition. - Ayoub Sadeghi; Nabiollah Shiri; Mahmood Rafiee; Parisa Rahimi (Comput. Electr. Eng., 2020)

High-Efficient, Ultra-Low-Power and High-Speed 4: 2 Compressor with a New Full Adder Cell for Bioelectronics Applications. - Ayoub Sadeghi; Nabiollah Shiri; Mahmood Rafiee (Circuits Syst. Signal Process., 2020)

Diagnosis of brain tumours by MRI binarisation with variable fuzzy level. - Armaghan Shirali; Nabiollah Shiri (IET Image Process., 2020)

An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications. - Mahmood Rafiee; Farshad Pesaran; Ayoub Sadeghi; Nabiollah Shiri (Microelectron. J., 2021)

Low-Power and Fast-Swing-Restoration GDI-Based Magnitude Comparator for Digital Images Processing. - Mahmood Rafiee; Nabiollah Shiri; Ayoub Sadeghi; Abdolreza Darabi; Ebrahim Abiri (Circuits Syst. Signal Process., 2022)

High-Performance 1-Bit Full Adder With Excellent Driving Capability for Multistage Structures. - Mahmood Rafiee; Nabiollah Shiri; Ayoub Sadeghi (IEEE Embed. Syst. Lett., 2022)

Tolerant and low power subtractor with 4: 2 compressor and a new TG-PTL-float full adder cell. - Ayoub Sadeghi; Nabiollah Shiri; Mahmood Rafiee; Rahim Ghayour (IET Circuits Devices Syst., 2022)

SR-GDI CNTFET-based magnitude comparator for new generation of programmable integrated circuits. - Nabiollah Shiri; Ayoub Sadeghi; Mahmood Rafiee; Maryam Bigonah (Int. J. Circuit Theory Appl., 2022)

An efficient counter-based Wallace-tree multiplier with a hybrid full adder core for image blending. - Ayoub Sadeghi; Nabiollah Shiri; Mahmood Rafiee; Mahsa Tahghigh (Frontiers Inf. Technol. Electron. Eng., 2022)

A high-efficient imprecise discrete cosine transform block based on a novel full adder and Wallace multiplier for bioimages compression. - Elham Esmaeili; Farshad Pesaran; Nabiollah Shiri (Int. J. Circuit Theory Appl., 2023)

Efficient and optimized approximate GDI full adders based on dynamic threshold CNTFETs for specific least significant bits. - Ayoub Sadeghi; Razieh Ghasemi; Hossein Ghasemian; Nabiollah Shiri (Frontiers Inf. Technol. Electron. Eng., 2023)

Efficient GDI-based approximate subtractors for change detection in bio-image processing applications. - Fatemeh Pooladi; Farshad Pesaran; Nabiollah Shiri (Microelectron. J., 2023)

Voltage over-scaling CNT-based 8-bit multiplier by high-efficient GDI-based counters. - Ayoub Sadeghi; Nabiollah Shiri; Mahmood Rafiee; Abdolreza Darabi; Ebrahim Abiri (IET Comput. Digit. Tech., 2023)

Brain tumour detection in magnetic resonance imaging using Levenberg-Marquardt backpropagation neural network. - Marzieh Ghahramani; Nabiollah Shiri (IET Image Process., 2023)

High Efficient GDI-CNTFET-Based Approximate Full Adder for Next Generation of Computer Architectures. - Ayoub Sadeghi; Razieh Ghasemi; Hossein Ghasemian; Nabiollah Shiri (IEEE Embed. Syst. Lett., 2023)

Imprecise Subtractor Using a New Efficient Approximate-Based Gate Diffusion Input Full Adder for Bioimages Processing. - Forouzan Bahrami; Nabiollah Shiri; Farshad Pesaran (Comput. Electr. Eng., 2023)

A 38.5-fJ 14.4-ns Robust and Efficient Subthreshold-to-Suprathreshold Voltage-Level Shifter Comprising Logic Mismatch-Activated Current Control Circuit. - Mohammad N. Sharafi; Hamidreza Rashidian; Nabiollah Shiri (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

High-efficient and error-resilient gate diffusion input-based approximate full adders for complex multistage rapid structures. - Nabiollah Shiri; Ayoub Sadeghi; Mahmood Rafiee (Comput. Electr. Eng., 2023)

High-efficient reversible full adder realized by dynamic threshold-based gate diffusion input logics. - Seyedeh Fatemeh Deymad; Nabiollah Shiri; Farshad Pesaran (Microelectron. J., 2023)

Realization of a high-efficient GDI-based 4:2 compressor for sum of absolute difference detection in image and signal processing. - Mehdi Hosseinpour; Nabiollah Shiri; Farshad Pesaran (Comput. Electr. Eng., 2024)

An Efficient Approximate Multiplier with Encoded Partial Products and Inexact Counter for Joint Photographic Experts Group Compression. - Elham Esmaeili; Nabiollah Shiri (IET Circuits Devices Syst., 2024)

An adaptive neuro-fuzzy inference system optimized by genetic algorithm for brain tumour detection in magnetic resonance images. - Marzieh Ghahramani; Nabiollah Shiri (IET Image Process., 2024)

Characterizing parameter variations for enhanced performance and adaptability in 3 nm MBCFET technology. - Mahmood Rafiee; Nabiollah Shiri; Mohsen Gharehkhani; Alexandra Pinto Castellanos; Ayoub Sadeghi (Microelectron. J., 2024)

A New Approximate Sum of Absolute Differences Unit for Bioimages Processing. - Forouzan Bahrami; Nabiollah Shiri; Farshad Pesaran (IEEE Embed. Syst. Lett., 2024)

A new ripple carry adder structure based on a swing-boosted full adder for concurrent error correction in low-resolution pipeline analog-to-digital converters. - Mahsa Tahghigh; Nabiollah Shiri (Int. J. Circuit Theory Appl., 2024)

A Multiplier-Free Discrete Cosine Transform Architecture Using Approximate Full Adder and Subtractor. - Elham Esmaeili; Nabiollah Shiri; Mahmood Rafiee; Ayoub Sadeghi (IEEE Embed. Syst. Lett., 2024)

A neural network-based error correction in the first-stage residue of pipelined analog to digital converters. - Roghayeh Rafieisangari; Nabiollah Shiri (Int. J. Circuit Theory Appl., 2024)

FPGA-Based Multiplier with a New Approximate Full Adder for Error-Resilient Applications. - Ali Ranjbar; Elham Esmaeili; Roghayeh Rafieisangari; Nabiollah Shiri (CoRR, 2025)

High-Efficient Approximate Subtractors for Change Detection Applications. - Fatemeh Pooladi; Farshad Pesaran; Nabiollah Shiri (IEEE Embed. Syst. Lett., 2025)