On Line Testing of Single Feedback Bridging Fault in Cluster Based FPGA by Using Asynchronous Element. - Nachiketa Das; Pranab Roy; Hafizur Rahaman 001 (IOLTS, 2008)

Runtime Congestion and Crosstalk Aware Router for FPGA Using Jbits3.0 for Partial Reconfigurable Application. - Nachiketa Das; Pranab Roy; Hafizur Rahaman 001 (ISED, 2011)

Bridging fault detection in cluster based FPGA by using Muller C element. - Nachiketa Das; Pranab Roy; Hafizur Rahaman 001 (Comput. Electr. Eng., 2013)

Built-in-self-test technique for diagnosis of delay faults in cluster-based field programmable gate arrays. - Nachiketa Das; Pranab Roy; Hafizur Rahaman 001 (IET Comput. Digit. Tech., 2013)

Digital Design and Pipelined Architecture for Reversible Watermarking Based on Difference Expansion Using FPGA. - Sudip Ghosh 001; Nachiketa Das; Subhajit Das 001; Santi P. Maity; Hafizur Rahaman 001 (ICIT, 2014)

An adaptive feedback based reversible watermarking algorithm using difference expansion. - Sudip Ghosh 001; Nachiketa Das; Subhajit Das 001; Santi Prasad Maity; Hafizur Rahaman 001 (ReTIS, 2015)

Correction to: VLSI-Based Pipeline Architecture for Reversible Image Watermarking by Difference Expansion with High-Level Synthesis Approach. - Subhajit Das 001; Sudip Ghosh 001; Nachiketa Das; Santi P. Maity; Hafizur Rahaman 001; Reshmi Maity; Niladri Maity (Circuits Syst. Signal Process., 2018)