Design of CMOS Ternary Latches. - Xiaoqiang Shou; Nader Kalantari; Michael M. Green (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

All-CMOS High-Speed CML Gates with Active Shunt-Peaking. - Nader Kalantari; Michael M. Green (ISCAS, 2007)

A Multichannel Serial Link Receiver With Dual-Loop Clock-and-Data Recovery and Channel Equalization. - Nader Kalantari; James F. Buckwalter (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)