A 2.5D integrated voltage regulator using coupled-magnetic-core inductors on silicon interposer delivering 10.8A/mm2. - Noah Sturcken; Eugene J. O'Sullivan; Naigang Wang; Philipp Herget; Bucknell C. Webb; Lubomyr T. Romankiw; Michele Petracca; Ryan Davies; Robert E. Fontana Jr.; Gary M. Decad; Ioannis Kymissis; Angel V. Peterchev; et al. (ISSCC, 2012)

A 2.5D Integrated Voltage Regulator Using Coupled-Magnetic-Core Inductors on Silicon Interposer. - Noah Sturcken; Eugene J. O'Sullivan; Naigang Wang; Philipp Herget; Bucknell C. Webb; Lubomyr T. Romankiw; Michele Petracca; Ryan Davies; Robert E. Fontana Jr.; Gary M. Decad; Ioannis Kymissis; Angel V. Peterchev; et al. (IEEE J. Solid State Circuits, 2013)

An 82%-efficient multiphase voltage-regulator 3D interposer with on-chip magnetic inductors. - Kevin Tien; Noah Sturcken; Naigang Wang; Jae-Woong Nah; Bing Dang; Eugene J. O'Sullivan; Paul S. Andry; Michele Petracca; Luca P. Carloni; William J. Gallagher; Kenneth L. Shepard (VLSIC, 2015)

Novel IC Sub-Threshold IDDQ Signature And Its Relationship To Aging During High Voltage Stress. - Franco Stellari; Naigang Wang; Peilin Song (ESSDERC, 2018)

Across the Stack Opportunities for Deep Learning Acceleration. - Vijayalakshmi Srinivasan; Bruce M. Fleischer; Sunil Shukla; Matthew M. Ziegler; Joel Silberman; Jinwook Oh; Jungwook Choi; Silvia M. Mueller; Ankur Agrawal; Tina Babinsky; Nianzheng Cao; Chia-Yu Chen; et al. (ISLPED, 2018)

Training Deep Neural Networks with 8-bit Floating Point Numbers. - Naigang Wang; Jungwook Choi; Daniel Brand; Chia-Yu Chen; Kailash Gopalakrishnan (NeurIPS, 2018)

A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference. - Bruce M. Fleischer; Sunil Shukla; Matthew M. Ziegler; Joel Silberman; Jinwook Oh; Vijayalakshmi Srinivasan; Jungwook Choi; Silvia M. Mueller; Ankur Agrawal; Tina Babinsky; Nianzheng Cao; Chia-Yu Chen; et al. (VLSI Circuits, 2018)

DLFloat: A 16-b Floating Point Format Designed for Deep Learning Training and Inference. - Ankur Agrawal; Bruce M. Fleischer; Silvia M. Mueller; Xiao Sun 013; Naigang Wang; Jungwook Choi; Kailash Gopalakrishnan (ARITH, 2019)

Accumulation Bit-Width Scaling For Ultra-Low Precision Training Of Deep Networks. - Charbel Sakr; Naigang Wang; Chia-Yu Chen; Jungwook Choi; Ankur Agrawal; Naresh R. Shanbhag; Kailash Gopalakrishnan (ICLR (Poster), 2019)

Hybrid 8-bit Floating Point (HFP8) Training and Inference for Deep Neural Networks. - Xiao Sun 013; Jungwook Choi; Chia-Yu Chen; Naigang Wang; Swagath Venkataramani; Vijayalakshmi Srinivasan; Xiaodong Cui; Wei Zhang 022; Kailash Gopalakrishnan (NeurIPS, 2019)

Innovate Practices on CyberSecurity of Hardware Semiconductor Devices. - Alfred L. Crouch; Peter L. Levin; Jennifer Dworak; Lakshmi Ramakrishnan; Yuhe Xia; Chi Zhang; Daniel Engels; Gary Evans; Ping Gui; Scott McWilliams; Saurabh Gupta 005; Franco Stellari; et al. (VTS, 2019)

ScaleCom: Scalable Sparsified Gradient Compression for Communication-Efficient Distributed Training. - Chia-Yu Chen; Jiamin Ni; Songtao Lu; Xiaodong Cui; Pin-Yu Chen; Xiao Sun 013; Naigang Wang; Swagath Venkataramani; Vijayalakshmi Srinivasan; Wei Zhang 022; Kailash Gopalakrishnan (NeurIPS, 2020)

Ultra-Low Precision 4-bit Training of Deep Neural Networks. - Xiao Sun 013; Naigang Wang; Chia-Yu Chen; Jiamin Ni; Ankur Agrawal; Xiaodong Cui; Swagath Venkataramani; Kaoutar El Maghraoui; Vijayalakshmi Srinivasan; Kailash Gopalakrishnan (NeurIPS, 2020)

A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference. - Jinwook Oh; Sae Kyu Lee; Mingu Kang; Matthew M. Ziegler; Joel Silberman; Ankur Agrawal; Swagath Venkataramani; Bruce M. Fleischer; Michael Guillorn; Jungwook Choi; Wei Wang 333; Silvia M. Mueller; et al. (VLSI Circuits, 2020)

Efficient AI System Design With Cross-Layer Approximate Computing. - Swagath Venkataramani; Xiao Sun 013; Naigang Wang; Chia-Yu Chen; Jungwook Choi; Mingu Kang; Ankur Agarwal; Jinwook Oh; Shubham Jain; Tina Babinsky; Nianzheng Cao; Thomas W. Fox; et al. (Proc. IEEE, 2020)

Hardware-Aware Neural Architecture Search: Survey and Taxonomy. - Hadjer Benmeziane; Kaoutar El Maghraoui; Hamza Ouarnoughi; Smaïl Niar; Martin Wistuba; Naigang Wang (IJCAI, 2021)

4-Bit Quantization of LSTM-Based Speech Recognition Models. - Andrea Fasoli; Chia-Yu Chen; Mauricio J. Serrano; Xiao Sun 013; Naigang Wang; Swagath Venkataramani; George Saon; Xiaodong Cui; Brian Kingsbury; Wei Zhang 022; Zoltán Tüske; Kailash Gopalakrishnan (Interspeech, 2021)

RaPiD: AI Accelerator for Ultra-low Precision Training and Inference. - Swagath Venkataramani; Vijayalakshmi Srinivasan; Wei Wang 333; Sanchari Sen; Jintao Zhang; Ankur Agrawal; Monodeep Kar; Shubham Jain; Alberto Mannari; Hoang Tran; Yulong Li; Eri Ogawa; et al. (ISCA, 2021)

A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling. - Ankur Agrawal; Sae Kyu Lee; Joel Silberman; Matthew M. Ziegler; Mingu Kang; Swagath Venkataramani; Nianzheng Cao; Bruce M. Fleischer; Michael Guillorn; Matt Cohen; Silvia M. Mueller; Jinwook Oh; et al. (ISSCC, 2021)

A Comprehensive Survey on Hardware-Aware Neural Architecture Search. - Hadjer Benmeziane; Kaoutar El Maghraoui; Hamza Ouarnoughi; Smaïl Niar; Martin Wistuba; Naigang Wang (CoRR, 2021)

All at Once Network Quantization via Collaborative Knowledge Transfer. - Ximeng Sun; Rameswar Panda; Chun-Fu Chen 001; Naigang Wang; Bowen Pan; Kailash Gopalakrishnan; Aude Oliva; Rogério Feris; Kate Saenko (CoRR, 2021)

Deep Compression of Pre-trained Transformer Models. - Naigang Wang; Chi-Chun (Charlie) Liu; Swagath Venkataramani; Sanchari Sen; Chia-Yu Chen; Kaoutar El Maghraoui; Vijayalakshmi Srinivasan; Leland Chang (NeurIPS, 2022)

A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling. - Sae Kyu Lee; Ankur Agrawal; Joel Silberman; Matthew M. Ziegler; Mingu Kang; Swagath Venkataramani; Nianzheng Cao; Bruce M. Fleischer; Michael Guillorn; Matthew Cohen; Silvia M. Mueller; Jinwook Oh; et al. (IEEE J. Solid State Circuits, 2022)

A Provably Effective Method for Pruning Experts in Fine-tuned Sparse Mixture-of-Experts. - Mohammed Nowaz Rabbani Chowdhury; Meng Wang 003; Kaoutar El Maghraoui; Naigang Wang; Pin-Yu Chen; Christopher D. Carothers (ICML, 2024)

MagR: Weight Magnitude Reduction for Enhancing Post-Training Quantization. - Aozhong Zhang; Naigang Wang; Yanxia Deng; Xin Li; Zi Yang; Penghang Yin (NeurIPS, 2024)

Improved Techniques for Quantizing Deep Networks with Adaptive Bit-Widths. - Ximeng Sun; Rameswar Panda; Chun-Fu Richard Chen; Naigang Wang; Bowen Pan; Aude Oliva; Rogério Feris; Kate Saenko (WACV, 2024)

COMQ: A Backpropagation-Free Algorithm for Post-Training Quantization. - Aozhong Zhang; Zi Yang; Naigang Wang; Yingyong Qin; Jack Xin; Xin Li 005; Penghang Yin (CoRR, 2024)

Mitigating the Impact of Outlier Channels for Language Model Quantization with Activation Regularization. - Aniruddha Nrusimha; Mayank Mishra; Naigang Wang; Dan Alistarh; Rameswar Panda; Yoon Kim (CoRR, 2024)

MagR: Weight Magnitude Reduction for Enhancing Post-Training Quantization. - Aozhong Zhang; Naigang Wang; Yanxia Deng; Xin Li 005; Zi Yang; Penghang Yin (CoRR, 2024)

Compressing Recurrent Neural Networks for FPGA-accelerated Implementation in Fluorescence Lifetime Imaging. - Ismail Erbas; Vikas Pandey; Aporva Amarnath; Naigang Wang; Karthik Swaminathan; Stefan T. Radev; Xavier Intes (CoRR, 2024)

Unlocking Real-Time Fluorescence Lifetime Imaging: Multi-Pixel Parallelism for FPGA-Accelerated Processing. - Ismail Erbas; Aporva Amarnath; Vikas Pandey; Karthik Swaminathan; Naigang Wang; Xavier Intes (CoRR, 2024)

No Time to Lose: Enabling Real-Time Fluorescence Lifetime Imaging on Resource-constrained FPGAs Through Efficient Scheduling. - Ismail Erbas; Aporva Amarnath; Vikas Pandey; Karthik Swaminathan; Naigang Wang; Xavier Intes (FPGA, 2025)

COMQ: A Backpropagation-Free Algorithm for Post-Training Quantization. - Aozhong Zhang; Zi Yang; Naigang Wang; Yingyong Qi; Jack Xin; Xin Li 005; Penghang Yin (IEEE Access, 2025)

CLoQ: Enhancing Fine-Tuning of Quantized LLMs via Calibrated LoRA Initialization. - Yanxia Deng; Aozhong Zhang; Selcuk Gurses; Naigang Wang; Zi Yang; Penghang Yin (Trans. Mach. Learn. Res., 2025)

Compressed Decentralized Momentum Stochastic Gradient Methods for Nonconvex Optimization. - Wei Liu; Anweshit Panda; Ujwal Pandey; Christopher Brissette; Yikang Shen; George M. Slota; Naigang Wang; Jie Chen; Yangyang Xu (Trans. Mach. Learn. Res., 2025)

EvidenceMoE: A Physics-Guided Mixture-of-Experts with Evidential Critics for Advancing Fluorescence Light Detection and Ranging in Scattering Media. - Ismail Erbas; Ferhat Demirkiran; Karthik Swaminathan; Naigang Wang; Navid Ibtehaj Nizam; Stefan T. Radev; Kaoutar El Maghraoui; Xavier Intes; Vikas Pandey (CoRR, 2025)

DiaBlo: Diagonal Blocks Are Sufficient For Finetuning. - Selcuk Gurses; Aozhong Zhang; Yanxia Deng; Xun Dong; Xin Li 005; Naigang Wang; Penghang Yin; Zi Yang (CoRR, 2025)

Guest Editorial Generative Artificial Intelligence Compute: Algorithms, Implementations, and Applications to CAS. - Chuan Zhang 001; Naigang Wang; Jongsun Park 001; Li Zhang 011 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2025)

Generative AI Through CAS Lens: An Integrated Overview of Algorithmic Optimizations, Architectural Advances, and Automated Designs. - Chuan Zhang 001; You You; Naigang Wang; Jongsun Park 001; Li Zhang 011 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2025)

Accelerating LLM Inference via Dynamic KV Cache Placement in Heterogeneous Memory System. - Yunhua Fang; Rui Xie 006; Asad Ul Haq; Linsen Ma; Kaoutar El Maghraoui; Naigang Wang; Meng Wang; Liu Liu 017; Tong Zhang 002 (CoRR, 2025)