A 32kB secure cache memory with dynamic replacement mapping in 65nm bulk CMOS. - Burak Erbagci; Fangfei Liu; Cagla Cakir; Nail Etkin Can Akkaya; Ruby B. Lee; Ken Mai (A-SSCC, 2015)

A 275 Gbps AES encryption accelerator using ROM-based S-boxes in 65nm. - Burak Erbagci; Nail Etkin Can Akkaya; Craig Teegarden; Ken Mai (CICC, 2015)

A DPA-resistant self-timed three-phase dual-rail pre-charge logic family. - Nail Etkin Can Akkaya; Burak Erbagci; Raymond Carley; Ken Mai (HOST, 2015)

A secure camouflaged threshold voltage defined logic family. - Burak Erbagci; Cagri Erbagci; Nail Etkin Can Akkaya; Ken Mai (HOST, 2016)

Secure chip odometers using intentional controlled aging. - Nail Etkin Can Akkaya; Burak Erbagci; Ken Mai (HOST, 2018)

A compact energy-efficient pseudo-static camouflaged logic family. - Prashanth Mohan; Nail Etkin Can Akkaya; Burak Erbagci; Ken Mai (HOST, 2018)

A secure camouflaged logic family using post-manufacturing programming with a 3.6GHz adder prototype in 65nm CMOS at 1V nominal VDD. - Nail Etkin Can Akkaya; Burak Erbagci; Ken Mai (ISSCC, 2018)

An Inherently Secure FPGA using PUF Hardware-Entanglement and Side-Channel Resistant Logic in 65nm Bulk CMOS. - Burak Erbagci; Nail Etkin Can Akkaya; Cagri Erbagci; Ken Mai (ESSCIRC, 2019)

Secure hardware-entangled field programmable gate arrays. - Burak Erbagci; Nail Etkin Can Akkaya; Mudit Bhargava; Rachel Dondero; Ken Mai (J. Parallel Distributed Comput., 2019)

A 135.6Tbps/W 2R2W SRAM with 12T Logic Bit-cell with Vmin Down to 335mV Targeted for Machine-Learning Applications in 6nm FinFET CMOS Technology. - Nail Etkin Can Akkaya; Gary Chan; Hung-Jen Liao; Yih Wang; Jonathan Chang (VLSI Technology and Circuits, 2022)