Exploiting the Leakage: Analysis of Some Authenticated Encryption Schemes. - Donghoon Chang; Amit Kumar Chauhan; Naina Gupta 001; Arpan Jati; Somitra Kumar Sanadhya (SPACE, 2016)

XMSS and Embedded Systems - XMSS Hardware Accelerators for RISC-V. - Wen Wang 007; Bernhard Jungk; Julian Wälde; Shuwen Deng; Naina Gupta 001; Jakub Szefer; Ruben Niederhagen (IACR Cryptol. ePrint Arch., 2018)

XMSS and Embedded Systems. - Wen Wang 007; Bernhard Jungk; Julian Wälde; Shuwen Deng; Naina Gupta 001; Jakub Szefer; Ruben Niederhagen (SAC, 2019)

SPQCop: Side-channel protected Post-Quantum Cryptoprocessor. - Arpan Jati; Naina Gupta 001; Anupam Chattopadhyay; Somitra Kumar Sanadhya (IACR Cryptol. ePrint Arch., 2019)

Post-Quantum Secure Boot. - Vinay B. Y. Kumar; Naina Gupta 001; Anupam Chattopadhyay; Michael Kasper; Christoph Krauß; Ruben Niederhagen (DATE, 2020)

Towards Designing a Secure RISC-V System-on-Chip: ITUS. - Vinay B. Y. Kumar; Suman Deb; Naina Gupta 001; Shivam Bhasin; Jawad Haj-Yahya; Anupam Chattopadhyay; Avi Mendelson (J. Hardw. Syst. Secur., 2020)

Threshold Implementations of GIFT: A Trade-Off Analysis. - Arpan Jati; Naina Gupta 001; Anupam Chattopadhyay; Somitra Kumar Sanadhya; Donghoon Chang (IEEE Trans. Inf. Forensics Secur., 2020)

In Quest for Fast and Secure SoC. - Naina Gupta 001; Anupam Chattopadhyay (VLSI-SoC, 2021)

MemEnc: A Lightweight, Low-Power, and Transparent Memory Encryption Engine for IoT. - Naina Gupta 001; Arpan Jati; Anupam Chattopadhyay (IEEE Internet Things J., 2021)

PQC Acceleration Using GPUs: FrodoKEM, NewHope, and Kyber. - Naina Gupta 001; Arpan Jati; Amit Kumar Chauhan; Anupam Chattopadhyay (IEEE Trans. Parallel Distributed Syst., 2021)

CRYSTALS-Dilithium on RISC-V Processor: Lightweight Secure Boot Using Post-Quantum Digital Signature. - Naina Gupta 001; Arpan Jati; Anupam Chattopadhyay (ICCAD, 2023)

BAKSHEESH: Similar Yet Different From GIFT. - Anubhab Baksi; Jakub Breier; Anupam Chattopadhyay; Tomas Gerlich; Sylvain Guilley; Naina Gupta 001; Kai Hu; Takanori Isobe 001; Arpan Jati; Petr Jedlicka; Hyunjun Kim; Fukang Liu; et al. (IACR Cryptol. ePrint Arch., 2023)

AI Attacks AI: Recovering Neural Network architecture from NVDLA using AI-assisted Side Channel Attack. - Naina Gupta 001; Arpan Jati; Anupam Chattopadhyay (IACR Cryptol. ePrint Arch., 2023)

Lightweight Hardware Accelerator for Post-Quantum Digital Signature CRYSTALS-Dilithium. - Naina Gupta 001; Arpan Jati; Anupam Chattopadhyay; Gautam Jha (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

SoCFaSe: in quest for fast and secure SoC architectures - Naina Gupta 001 (2023)

EFFLUX-F2: A High Performance Hardware Security Evaluation Board. - Arpan Jati; Naina Gupta 001; Anupam Chattopadhyay; Somitra Kumar Sanadhya (IACR Cryptol. ePrint Arch., 2024)

A Configurable CRYSTALS-Kyber Hardware Implementation with Side-Channel Protection. - Arpan Jati; Naina Gupta 001; Anupam Chattopadhyay; Somitra Kumar Sanadhya (ACM Trans. Embed. Comput. Syst., 2024)