An SoC with 1.3 gtexels/s 3-D graphics full pipeline for consumer applications. - Donghyun Kim 014; Kyusik Chung; Chang-Hyo Yu; Chun-Ho Kim; Inho Lee; Jaewan Bae; Young-Jun Kim 001; Jae-Hyeon Park; Sungbeen Kim; Yong-Ha Park; Nak Hee Seong; Jin-Aeon Lee; et al. (IEEE J. Solid State Circuits, 2006)

An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth. - Dong Hyuk Woo; Nak Hee Seong; Dean L. Lewis; Hsien-Hsin S. Lee (HPCA, 2010)

Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping. - Nak Hee Seong; Dong Hyuk Woo; Hsien-Hsin S. Lee (ISCA, 2010)

SAFER: Stuck-At-Fault Error Recovery for Memories. - Nak Hee Seong; Dong Hyuk Woo; Vijayalakshmi Srinivasan; Jude A. Rivers; Hsien-Hsin S. Lee (MICRO, 2010)

Security Refresh: Protecting Phase-Change Memory against Malicious Wear Out. - Nak Hee Seong; Dong Hyuk Woo; Hsien-Hsin S. Lee (IEEE Micro, 2011)

A reliable, secure phase-change memory as a main memory. - Nak Hee Seong (2012)

Tri-level-cell phase change memory: toward an efficient and reliable memory system. - Nak Hee Seong; Sungkap Yeo; Hsien-Hsin S. Lee (ISCA, 2013)

Pragmatic Integration of an SRAM Row Cache in Heterogeneous 3-D DRAM Architecture Using TSV. - Dong Hyuk Woo; Nak Hee Seong; Hsien-Hsin S. Lee (IEEE Trans. Very Large Scale Integr. Syst., 2013)

2.4 A 7nm High-Performance and Energy-Efficient Mobile Application Processor with Tri-Cluster CPUs and a Sparsity-Aware NPU. - Young-Duk Kim; Wookyeong Jeong; Lakkyung Jung; Dongsuk Shin; Jae Geun Song; Jinook Song; Hyeokman Kwon; Jaeyoung Lee; Jaesu Jung; Myungjin Kang; Jaehun Jeong; Yoonjoo Kwon; et al. (ISSCC, 2020)