Real time all intra HEVC HD encoder on FPGA. - Sachille Atapattu; Namitha Liyanage; Nisal Menuka; Ishantha Perera; Ajith Pasqual (ASAP, 2016)

High performance hardware architectures for Intra Block Copy and Palette Coding for HEVC screen content coding extension. - Rishan Senanayake; Namitha Liyanage; Sasindu Wijeratne; Sachille Atapattu; Kasun Athukorala; P. M. K. Tharaka; Geethan Karunaratne; R. M. A. U. Senarath; Ishantha Perera; Ashen Ekanayake; Ajith Pasqual (ASAP, 2017)

Theseus: an Experiment in Operating System Structure and State Management. - Kevin Boos; Namitha Liyanage; Ramla Ijaz; Lin Zhong 001 (OSDI, 2020)

Scalable Quantum Error Correction for Surface Codes using FPGA. - Namitha Liyanage; Yue Wu; Alexander Deters; Lin Zhong 001 (FCCM, 2023)

Multi-FPGA System for Quantum Error Correction with Lattice Surgery. - Namitha Liyanage; Yue Wu; Emmet Houghton; Lin Zhong 001 (QCE, 2024)

FPGA-based Distributed Union-Find Decoder for Surface Codes. - Namitha Liyanage; Yue Wu; Siona Tagare; Lin Zhong 001 (CoRR, 2024)

LEGO: QEC Decoding System Architecture for Dynamic Circuits. - Yue Wu; Namitha Liyanage; Lin Zhong 001 (CoRR, 2024)

Micro Blossom: Accelerated Minimum-Weight Perfect Matching Decoding for Quantum Error Correction. - Yue Wu; Namitha Liyanage; Lin Zhong 001 (ASPLOS (2), 2025)

Network-Integrated Decoding System for Real-Time Quantum Error Correction with Lattice Surgery. - Namitha Liyanage; Yue Wu; Emmet Houghton; Lin Zhong 001 (CoRR, 2025)